Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S936712AbdIZGrb (ORCPT ); Tue, 26 Sep 2017 02:47:31 -0400 Received: from resqmta-ch2-08v.sys.comcast.net ([69.252.207.40]:40230 "EHLO resqmta-ch2-08v.sys.comcast.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933842AbdIZGr3 (ORCPT ); Tue, 26 Sep 2017 02:47:29 -0400 Date: Tue, 26 Sep 2017 01:47:27 -0500 (CDT) From: Christopher Lameter X-X-Sender: cl@nuc-kabylake To: Tejun Heo cc: Mark Rutland , linux-kernel@vger.kernel.org, Arnd Bergmann , Peter Zijlstra , Pranith Kumar , linux-arch@vger.kernel.org Subject: Re: [PATCH] percpu: make this_cpu_generic_read() atomic w.r.t. interrupts In-Reply-To: <20170925154404.GA560070@devbig577.frc2.facebook.com> Message-ID: References: <1506345872-30559-1-git-send-email-mark.rutland@arm.com> <20170925151826.GK828415@devbig577.frc2.facebook.com> <20170925153301.GA29775@leverpostej> <20170925154404.GA560070@devbig577.frc2.facebook.com> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-CMAE-Envelope: MS4wfLT67L31kLSyOTQOxjUWboUucKCF95WHeiGGK/0/5hE45QkJ2tZvic/BEE137zBie7yyVQoiz2I1j+jq/kLKrowEodRFpAd0Keywg5LRGt7wGKChNfIq YdV3zOQyclt2Y4teBPsyCWOd1tfsXzgr8ecGo3+cqEB1ombV7AU6vQn5QBods6FgSy70ZSRXHBQF6zzDY8THr1rKmwqrW46j3PKxEEOIWoW7TtyEzVVUskvC O6becEOpbIsz0HJfCtUVn7u0hP3Ct7iyRwO8nXyhXIMfwhc57tY4ppI1v5QluEsSC0bKm6s7gJHOoJOumV+2AVs6/0Rp6yqSlKYFb6TQ2NC6YtTyLbLovSuu DKU1RUew Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1333 Lines: 28 On Mon, 25 Sep 2017, Tejun Heo wrote: > Hello, > > On Mon, Sep 25, 2017 at 04:33:02PM +0100, Mark Rutland wrote: > > Unfortunately, the generic this_cpu_read(), which is intended to be > > irq-safe, is not: > > > > #define this_cpu_generic_read(pcp) \ > > ({ \ > > typeof(pcp) __ret; \ > > preempt_disable_notrace(); \ > > __ret = raw_cpu_generic_read(pcp); \ > > preempt_enable_notrace(); \ > > __ret; \ > > }) > > I see. Yeah, that looks like the bug there. This is a single fetch operation of a value that needs to be atomic. It really does not matter if an interrupt happens before or after that load because it could also occur before or after the preempt_enable/disable without the code being able to distinguish that case. The fetch of a scalar value from memory is an atomic operation and that is required from all arches. There is an exception for double word fetches. Maybe we would need to special code that case but so far this does not seem to have been an issue.