Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1033306AbdI0B5h (ORCPT ); Tue, 26 Sep 2017 21:57:37 -0400 Received: from mail-lf0-f66.google.com ([209.85.215.66]:34357 "EHLO mail-lf0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1033069AbdI0B5K (ORCPT ); Tue, 26 Sep 2017 21:57:10 -0400 X-Google-Smtp-Source: AOwi7QAjSys+KvZ4dNwumTuCL6oc8jsgyNB+Lwaoc7p4i/OobDTt9bs3HtpqYVE7aIOf29nD9wD5qg== Subject: Re: [PATCH v1 3/5] dt-bindings: Add DT bindings for NVIDIA Tegra AHB DMA controller To: Jon Hunter , Thierry Reding , Laxman Dewangan , Peter De Schrijver , Prashant Gaikwad , Michael Turquette , Stephen Boyd , Rob Herring , Vinod Koul Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org References: <604d92036e0936443290e68a2226f935fb348113.1506380746.git.digetx@gmail.com> From: Dmitry Osipenko Message-ID: <96bfdacb-3d2d-66b6-70f7-a87664b1afc7@gmail.com> Date: Wed, 27 Sep 2017 04:57:06 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.3.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1694 Lines: 41 On 26.09.2017 17:50, Jon Hunter wrote: > > On 26/09/17 00:22, Dmitry Osipenko wrote: >> Document DT bindings for NVIDIA Tegra AHB DMA controller that presents >> on Tegra20/30 SoC's. >> >> Signed-off-by: Dmitry Osipenko >> --- >> .../bindings/dma/nvidia,tegra20-ahbdma.txt | 23 ++++++++++++++++++++++ >> 1 file changed, 23 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt >> >> diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt b/Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt >> new file mode 100644 >> index 000000000000..2af9aa76ae11 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra20-ahbdma.txt >> @@ -0,0 +1,23 @@ >> +* NVIDIA Tegra AHB DMA controller >> + >> +Required properties: >> +- compatible: Must be "nvidia,tegra20-ahbdma" >> +- reg: Should contain registers base address and length. >> +- interrupts: Should contain one entry, DMA controller interrupt. >> +- clocks: Should contain one entry, DMA controller clock. >> +- resets : Should contain one entry, DMA controller reset. >> +- #dma-cells: Should be <1>. The cell represents DMA request select value >> + for the peripheral. For more details consult the Tegra TRM's >> + documentation, in particular AHB DMA channel control register >> + REQ_SEL field. > > What about the TRIG_SEL field? Do we need to handle this here as well? > Actually, DMA transfer trigger isn't related a hardware description. It's up to software to decide what trigger to select. So it shouldn't be in the binding. And I think the same applies to requester... any objections? -- Dmitry