Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751994AbdI1Qhx (ORCPT ); Thu, 28 Sep 2017 12:37:53 -0400 Received: from mail-wr0-f172.google.com ([209.85.128.172]:43190 "EHLO mail-wr0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750942AbdI1Qhu (ORCPT ); Thu, 28 Sep 2017 12:37:50 -0400 X-Google-Smtp-Source: AOwi7QBRLlKzPz6ahgNxRtDyPZ57V0Qtg8FCzSHXRGhSJ4yDfTnmbbZ5Tu6foTRNCoqzIVLt1d9pfg== Subject: Re: [PATCH v1 4/5] dmaengine: Add driver for NVIDIA Tegra AHB DMA controller To: Vinod Koul Cc: Thierry Reding , Jonathan Hunter , Laxman Dewangan , Peter De Schrijver , Prashant Gaikwad , Michael Turquette , Stephen Boyd , Rob Herring , linux-tegra@vger.kernel.org, devicetree@vger.kernel.org, dmaengine@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org References: <0a45e058baba72124b91c663ce1d908d275f4044.1506380746.git.digetx@gmail.com> <20170928092949.GB30097@localhost> <260fa409-0d07-ec9e-9e3b-fb08255026d8@gmail.com> <20170928162238.GF30097@localhost> From: Dmitry Osipenko Message-ID: <3d7e0b5e-563a-5955-cb06-36ffa1b7e30f@gmail.com> Date: Thu, 28 Sep 2017 19:37:45 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.3.0 MIME-Version: 1.0 In-Reply-To: <20170928162238.GF30097@localhost> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1526 Lines: 40 On 28.09.2017 19:22, Vinod Koul wrote: > On Thu, Sep 28, 2017 at 05:35:59PM +0300, Dmitry Osipenko wrote: >> On 28.09.2017 17:06, Dmitry Osipenko wrote: >>> On 28.09.2017 12:29, Vinod Koul wrote: >>>>> + default: >>>>> + return -EINVAL; >>>>> + } >>>>> + >>>>> + ahb_seq = burst << TEGRA_AHBDMA_CHANNEL_AHB_BURST_SHIFT; >>>>> + ahb_seq |= TEGRA_AHBDMA_CHANNEL_ADDR_WRAP; >>>>> + ahb_seq |= TEGRA_AHBDMA_CHANNEL_INTR_ENB; >>>>> + >>>>> + writel_relaxed(ahb_seq, >>>>> + ahbdma_chan->regs + TEGRA_AHBDMA_CHANNEL_AHB_SEQ); >>>>> + >>>>> + writel_relaxed(ahb_addr, >>>>> + ahbdma_chan->regs + TEGRA_AHBDMA_CHANNEL_AHB_PTR); >>>> >>>> oh no, you don't write to HW here. This can be called anytime when you have >>>> txn running! You should save these and use them in prep_ calls. >>>> >>> >>> BTW, some of the DMA drivers have exactly the same problem. I now see that it is >>> actually documented explicitly in provider.txt, but that's inconsistent across >>> the actual drivers. >>> >> >> Also, shouldn't prep_ and dma_slave_config be protected with locking? I don't >> see DMA core doing any locking and seems none of the drivers too. > > In prep when you modify the list yes (with vchan I suspect that maybe taken > care), but in general yes driver needs to do that > I meant that one CPU could modify channels config, while other CPU is preparing the new TX using config that is in process of the modification. On the other hand, this looks like something that DMA client should take care of. -- Dmitry