Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752370AbdI1RvD (ORCPT ); Thu, 28 Sep 2017 13:51:03 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:50120 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751339AbdI1RvB (ORCPT ); Thu, 28 Sep 2017 13:51:01 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org F04086071B Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=absahu@codeaurora.org From: Abhishek Sahu To: Stephen Boyd , Michael Turquette Cc: Andy Gross , David Brown , Rajendra Nayak , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Abhishek Sahu Subject: [PATCH 00/13] Updates for QCOM Alpha PLL Date: Thu, 28 Sep 2017 23:20:37 +0530 Message-Id: <1506621050-10129-1-git-send-email-absahu@codeaurora.org> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1583 Lines: 35 This patch series does the miscellaneous changes in QCOM Alpha PLL operation and structure to support other types of Alpha PLL’s. 1. It adds the pll_type which will be used for determining all the properties of Alpha PLL. 2. It adds the support for Brammo and Huayra PLL’s for which the support is not available in existing alpha PLL code. 3. There won’t be any change in existing users of Alpha PLL’s since all the newly added code will be under flag for the default PLL operations. The previous RFC series can be found for this in https://www.spinics.net/lists/linux-clk/msg19305.html Abhishek Sahu (13): clk: qcom: remove redundant PLL_MODE macro offset clk: qcom: minor code reorganization related with offset variable clk: qcom: support for alpha pll properties clk: qcom: fix 16 bit alpha support calculation clk: qcom: add and use alpha register width from PLL properties clk: qcom: flag for 64 bit CONFIG_CTL clk: qcom: support for alpha mode configuration clk: qcom: support for dynamic updating the PLL clk: qcom: add flag for VCO operation clk: qcom: support for Huayra PLL clk: qcom: support for Brammo PLL clk: qcom: support for 2 bit PLL post divider clk: qcom: add read-only alpha pll post divider operations drivers/clk/qcom/clk-alpha-pll.c | 701 +++++++++++++++++++++++++++++++++------ drivers/clk/qcom/clk-alpha-pll.h | 19 +- 2 files changed, 609 insertions(+), 111 deletions(-) -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation