Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752783AbdI3LZJ (ORCPT ); Sat, 30 Sep 2017 07:25:09 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56094 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751677AbdI3LZI (ORCPT ); Sat, 30 Sep 2017 07:25:08 -0400 DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com ACE4D85545 Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=bhe@redhat.com Date: Sat, 30 Sep 2017 19:25:04 +0800 From: Baoquan He To: Mike Travis Cc: Ingo Molnar , rja@hpe.com, frank.ramsay@hpe.com, linux-kernel@vger.kernel.org, x86@kernel.org, mingo@redhat.com, tglx@linutronix.de, hpa@zytor.com, thgarnie@google.com, keescook@chromium.org, akpm@linux-foundation.org, yamada.masahiro@socionext.com, sivanich@hpe.com Subject: Re: [PATCH v2 RESEND 2/2] x86/mm/KASLR: Do not adapt the size of the direct mapping section for SGI UV system Message-ID: <20170930112504.GE17588@x1> References: <1504770150-25456-1-git-send-email-bhe@redhat.com> <1504770150-25456-3-git-send-email-bhe@redhat.com> <20170928075605.g74zm5xeglosmvct@gmail.com> <20170928083112.GN16025@x1> <20170928090143.m6sog2am2ccz5dm4@gmail.com> <25fc5345-3273-447e-de6a-2ac7c56d0f00@hpe.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <25fc5345-3273-447e-de6a-2ac7c56d0f00@hpe.com> User-Agent: Mutt/1.7.0 (2016-08-17) X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Sat, 30 Sep 2017 11:25:07 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2596 Lines: 70 Hi Mike, On 09/28/17 at 07:10am, Mike Travis wrote: > > > On 9/28/2017 2:01 AM, Ingo Molnar wrote: > > > > > If on SGI UV system, the kaslr_regions[0].size_tb, namely the size of > > > the direct mapping section, is incorrect. > > > > > > Its direct mapping size includes two parts: > > > #1 RAM size of system > > > #2 MMIOH region size which only SGI UV system has. > > > > > > However, the #2 can only be got till uv_system_init() is called in > > > native_smp_prepare_cpus(). That is too late for mm KASLR calculation. > > > That's why I made this hack. > > > > > > I checked uv_system_init() code, seems not easy to know the size of > > > MMIOH region before or inside kernel_randomize_memory(). I have CCed UV > > > devel experts, not sure if they have any idea about this. Otherwise, > > > this patch could be the only way I can think of. > > > > > > Hi Mike and Russ, > > > > > > Is there any chance we can get the size of MMIOH region before mm KASLR > > > code, namely before we call kernel_randomize_memory()? > > The sizes of the MMIOL and MMIOH areas are tied into the HUB design and how > it is communicated to BIOS and the kernel. This is via some of the config > MMR's found in the HUB and it would be impossible to provide any access to > these registers as they change with each new UV architecture. > > The kernel does reserve the memory in the EFI memmap. I can send you a > console log of the full startup that includes the MMIOH reservations. Note > that it is dependent on what I/O devices are actually present as UV does not > map empty slots unless forced (because we'd quickly run out of resources.) > Also, the EFI memmap entries do not specify the exact usage of the contained > areas. Does that mean we can get the size of MMIOH from efi entries? If yes, please help provide a console log including those. If can get size from efi, it will be more acceptable. Or I can ask Frank to loan his uv system to me, not sure if he is doing testing with them. Thanks Baoquan > > > > > I don't mind system specific quirks to hardware enumeration details, as long as > > they don't pollute generic code with such special hacks. > > > > I.e. in this case it's wrong to allow kaslr_regions[0].size_tb to be wrong. Any > > other code that relies on it in the future will be wrong as well on UV systems. > > Which may come into play on other arches with the new upcoming memory > technologies. > > > > The right quirk would be to fix that up where it gets introduced, or something > > like that. > > Yes, does make sense. > > > > Thanks, > > > > Ingo > >