Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753176AbdLAP7L (ORCPT ); Fri, 1 Dec 2017 10:59:11 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:51656 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752833AbdLAP6j (ORCPT ); Fri, 1 Dec 2017 10:58:39 -0500 From: Ivan Mikhaylov To: Alistair Popple , Matt Porter Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Benjamin Herrenschmidt , Joel Stanley , Paul Mackerras , Michael Ellerman Subject: [PATCH v2 3/4] 44x/fsp2: tvsense workaround for dd1 Date: Fri, 1 Dec 2017 18:58:26 +0300 X-Mailer: git-send-email 2.10.1 (Apple Git-78) X-MIMETrack: Itemize by SMTP Server on D06ML001/06/M/IBM(Release 9.0.1FP8HF179 | April 20, 2017) at 01/12/2017 15:58:31, Serialize by Router on D06ML001/06/M/IBM(Release 9.0.1FP8HF179 | April 20, 2017) at 01/12/2017 15:58:31, Serialize complete at 01/12/2017 15:58:31 X-TNEFEvaluated: 1 X-TM-AS-GCONF: 00 x-cbid: 17120115-0040-0000-0000-000003F4E1D8 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17120115-0041-0000-0000-000025F7CCCC Message-Id: <20171201155827.57979-3-ivan@de.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-12-01_04:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1712010182 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1604 Lines: 44 TVSENSE(temperature and voltage sensors) reset is blocked (clock gated) by the POR default of the TVS sleep config bit. As a consequence, TVSENSE will provide erratic sensor values, which may result in spurious (parity) errors recorded in the CMU FIR and leading to erroneous interrupt requests once the CMU interrupt is unmasked. Purpose of this to set up CMU in working state in any cases even in case of parity errors. Reviewed-by: Alistair Popple Signed-off-by: Ivan Mikhaylov --- arch/powerpc/platforms/44x/fsp2.c | 17 +++++++++++++++++ 1 files changed, 17 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/platforms/44x/fsp2.c b/arch/powerpc/platforms/44x/fsp2.c index baed409..7c9bc93 100644 --- a/arch/powerpc/platforms/44x/fsp2.c +++ b/arch/powerpc/platforms/44x/fsp2.c @@ -59,6 +59,23 @@ static int __init fsp2_probe(void) mtdcr(DCRN_PLB6_HD, 0xffff0000); mtdcr(DCRN_PLB6_SHD, 0xffff0000); + /* TVSENSE reset is blocked (clock gated) by the POR default of the TVS + * sleep config bit. As a consequence, TVSENSE will provide erratic + * sensor values, which may result in spurious (parity) errors + * recorded in the CMU FIR and leading to erroneous interrupt requests + * once the CMU interrupt is unmasked. + */ + + /* 1. set TVS1[UNDOZE] */ + val = mfcmu(CMUN_TVS1); + val |= 0x4; + mtcmu(CMUN_TVS1, val); + + /* 2. clear FIR[TVS] and FIR[TVSPAR] */ + val = mfcmu(CMUN_FIR0); + val |= 0x30000000; + mtcmu(CMUN_FIR0, val); + /* L2 machine checks */ mtl2(L2PLBMCKEN0, 0xffffffff); mtl2(L2PLBMCKEN1, 0x0000ffff); -- 1.7.1