Date: Fri, 01 Dec 2017 19:06:58 -0800 (PST)
Subject: RISC-V Memory Consistency Model Draft Specification
Message-ID: <mhng-32601631-47cc-4e2b-96ae-595b3197263f@palmer-si-x1c4>
CC: paulmck@linux.vnet.ibm.com, stern@rowland.harvard.edu,
        peterz@infradead.org, boqun.feng@gmail.com,
        linux-kernel@vger.kernel.org
From: Palmer Dabbelt <palmer@sifive.com>
To: Daniel Lustig <dlustig@nvidia.com>
Sender: linux-kernel-owner@vger.kernel.org
Content-Length: 2251
Lines: 44

I'm not sure what the best way to make sure this gets to all the right people 
is, so I've CC'd everyone I could find who contributed to our recent RISC-V 
related memory model discussions on LKML.  Sorry if this ends up blowing up 
someone's inbox.

Daniel Lustig, the chair of the RISC-V memory model task group, recently posted 
the first public draft of the RISC-V memory consistency model specification on 
the RISC-V ISA development mailing list.  As I'm sure many interested parties 
aren't subscribed to that list so I thought it'd be appropriate to bring it up 
on a Linux mailing list.

I'll copy the text of the message below, the actual specification is included 
as an attachment in the linked message.  Feel free to contribute either here or 
on isa-dev@groups.riscv.org, Dan is on both threads.

https://groups.google.com/a/groups.riscv.org/forum/#!topic/isa-dev/hKywNHBkAXM

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Hi everyone, 

We in the RISC-V memory model task group are ready to release the first
public draft of the memory consistency model specification that we've
been working on over the past few months.  For those of you who
attended the workshop this week, this document will fill in some of the
details.  For those of you who couldn't make it, I've attached my
presentation slides as well.  The video of my talk (and of all the other
talks) should be posted online within a week or so.

If anyone has any comments, questions, or feedback, feel free to respond
here, to reach out to us in the memory model task group, or even just to
respond to me directly.  I'm more than happy to take the feedback.

Over the next few weeks, assuming nobody uncovers any glaring errors,
we'll start working to merge this into the rest of the user-level ISA
spec (in some way or other, details TBD) so that we can aim to put forth
both together for official ratification in the coming months.  We'll
also of course fix any typos, bugs, or discrepancies that are found in
the meantime.

We're also actively communicating with the Linux maintainers, the gcc
and LLVM maintainers, and more so that we make sure that the memory
model interacts properly with all of the above.

Let us know what you think!