Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753795AbdLDMgD convert rfc822-to-8bit (ORCPT ); Mon, 4 Dec 2017 07:36:03 -0500 Received: from mailout.micron.com ([137.201.242.129]:20069 "EHLO mailout.micron.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752768AbdLDMf6 (ORCPT ); Mon, 4 Dec 2017 07:35:58 -0500 From: "Bean Huo (beanhuo)" To: "cyrille.pitchen@wedev4u.fr" , "marek.vasut@gmail.com" , "computersforpeace@gmail.com" , Boris Brezillon , "richard@nod.at" CC: "linux-mtd@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "Bean Huo (beanhuo)" Subject: [PATCH v2] drivers:mtd:spi-nor:checkup FSR error bits Thread-Topic: [PATCH v2] drivers:mtd:spi-nor:checkup FSR error bits Thread-Index: AdNs+ijJ53/4PnMCR/WR1htvL9cLXQ== Date: Mon, 4 Dec 2017 12:34:47 +0000 Message-ID: Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.160.29.124] X-TM-AS-Product-Ver: SMEX-12.0.0.1464-8.100.1062-23508.005 X-TM-AS-Result: No--6.734400-0.000000-31 X-TM-AS-MatchedID: 708712-703788-702942-703543-701177-704318-105250-705861-7 07027-702039-704980-863828-702560-700648-862883-188019-706290-706592-700398 -863596-700324-707788-703454-704713-708804-710375-148004-148050-148980-4200 0-42003-29961 X-TM-AS-User-Approved-Sender: Yes X-TM-AS-User-Blocked-Sender: No x-mt-checkinternalsenderrule: True Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2670 Lines: 76 For Micron spi nor device, when erase/program operation fails, especially the failure results from intending to modify protected space, spi-nor upper layers still get the return which shows the operation succeeds. This is because current spi_nor_fsr_ready() only uses FSR bit.7 (flag status register) to check device whether ready. This patch fixs this issue by checking relevant error bits in FSR. The FSR is a powerful tool to investigate the staus of device, checking information regarding what is actually doing the memory and detecting possible error conditions. Signed-off-by: beanhuo --- v1 - v2: - Changed some error comments based on Cyrille's reviews. drivers/mtd/spi-nor/spi-nor.c | 18 ++++++++++++++++-- include/linux/mtd/spi-nor.h | 6 +++++- 2 files changed, 21 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 19c00072..4423605 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -328,8 +328,22 @@ static inline int spi_nor_fsr_ready(struct spi_nor *nor) int fsr = read_fsr(nor); if (fsr < 0) return fsr; - else - return fsr & FSR_READY; + + if (fsr & (FSR_E_ERR | FSR_P_ERR)) { + if (fsr & FSR_E_ERR) + dev_err(nor->dev, "Erase operation failed.\n"); + else + dev_err(nor->dev, "Program operation failed.\n"); + + if (fsr & FSR_PT_ERR) + dev_err(nor->dev, + "Attempted to modify a protected sector.\n"); + + nor->write_reg(nor, SPINOR_OP_CLFSR, NULL, 0); + return -EIO; + } + + return fsr & FSR_READY; } static int spi_nor_ready(struct spi_nor *nor) diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 1f0a7fc..da8e0d5 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -61,6 +61,7 @@ #define SPINOR_OP_RDSFDP 0x5a /* Read SFDP */ #define SPINOR_OP_RDCR 0x35 /* Read configuration register */ #define SPINOR_OP_RDFSR 0x70 /* Read flag status register */ +#define SPINOR_OP_CLFSR 0x50 /* Clear flag status register */ /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */ #define SPINOR_OP_READ_4B 0x13 /* Read data bytes (low frequency) */ @@ -130,7 +131,10 @@ #define EVCR_QUAD_EN_MICRON BIT(7) /* Micron Quad I/O */ /* Flag Status Register bits */ -#define FSR_READY BIT(7) +#define FSR_READY BIT(7) /* Device status, 0 = Busy, 1 = Ready */ +#define FSR_E_ERR BIT(5) /* Erase operation status */ +#define FSR_P_ERR BIT(4) /* Program operation status */ +#define FSR_PT_ERR BIT(1) /* Protection error bit */ /* Configuration Register bits. */ #define CR_QUAD_EN_SPAN BIT(1) /* Spansion Quad I/O */ -- 2.7.4