From: Alexander Stein <alexander.stein@systec-electronic.com>
To: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Cc: LKML <linux-kernel@vger.kernel.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Marc Zyngier <marc.zyngier@arm.com>, Shawn Guo <shawnguo@kernel.org>
Subject: Re: polarity inversion on LS1021a
Date: Mon, 04 Dec 2017 16:31:39 +0100
Message-ID: <2780635.GsDK2O7NgM@ws-stein>
In-Reply-To: <67135504-72fb-ef7e-cac4-03331550a38d@prevas.dk>
References: <67135504-72fb-ef7e-cac4-03331550a38d@prevas.dk>
MIME-Version: 1.0
Content-Transfer-Encoding: 7Bit
Content-Type: text/plain; charset="us-ascii"
Sender: linux-kernel-owner@vger.kernel.org
Content-Length: 1103
Lines: 25

Hi Rasmus,

On Monday, December 4, 2017, 4:11:06 PM CET Rasmus Villemoes wrote:
> The LS1021A has a standard GIC-400, but allows inverting the polarity of
> six external interrupt lines via a certain register, effectively
> supporting IRQ_TYPE_LEVEL_LOW and IRQ_TYPE_EDGE_FALLING for those.
> 
> I'm trying to figure out how one would add support for this. The patch
> below works but is obviously just meant to help show what I mean, so
> please don't comment on all the things that are wrong with it.
> 
> It feels wrong to create a whole new irqchip driver copy-pasting the
> entire irg-gic.c, but I can't figure out how and where one could hook
> into the existing one. Any pointers on how to do this properly will be
> greatly appreciated.

In my opinion a new irqchip is still required, but solely for modifying
SCFG_INTPCR depending on IRQ_TYPE_*
You would need to insert it as a cascading interrupt chip in device tree.
You also need to protect accesses to this register using a spinlock.
This is at least my idea how I would have done it, though never got time
for it.

Best regards,
Alexander