Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751964AbdLDPh0 (ORCPT ); Mon, 4 Dec 2017 10:37:26 -0500 Received: from foss.arm.com ([217.140.101.70]:37488 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751033AbdLDPhX (ORCPT ); Mon, 4 Dec 2017 10:37:23 -0500 Subject: Re: polarity inversion on LS1021a To: Alexander Stein , Rasmus Villemoes Cc: LKML , Thomas Gleixner , Shawn Guo References: <67135504-72fb-ef7e-cac4-03331550a38d@prevas.dk> <2780635.GsDK2O7NgM@ws-stein> From: Marc Zyngier Organization: ARM Ltd Message-ID: <4f27f4e1-f42c-e931-a31b-067bb62eed77@arm.com> Date: Mon, 4 Dec 2017 15:37:20 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: <2780635.GsDK2O7NgM@ws-stein> Content-Type: text/plain; charset=utf-8 Content-Language: en-GB Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1357 Lines: 30 On 04/12/17 15:31, Alexander Stein wrote: > Hi Rasmus, > > On Monday, December 4, 2017, 4:11:06 PM CET Rasmus Villemoes wrote: >> The LS1021A has a standard GIC-400, but allows inverting the polarity of >> six external interrupt lines via a certain register, effectively >> supporting IRQ_TYPE_LEVEL_LOW and IRQ_TYPE_EDGE_FALLING for those. >> >> I'm trying to figure out how one would add support for this. The patch >> below works but is obviously just meant to help show what I mean, so >> please don't comment on all the things that are wrong with it. >> >> It feels wrong to create a whole new irqchip driver copy-pasting the >> entire irg-gic.c, but I can't figure out how and where one could hook >> into the existing one. Any pointers on how to do this properly will be >> greatly appreciated. > > In my opinion a new irqchip is still required, but solely for modifying > SCFG_INTPCR depending on IRQ_TYPE_* > You would need to insert it as a cascading interrupt chip in device tree. > You also need to protect accesses to this register using a spinlock. > This is at least my idea how I would have done it, though never got time > for it. Almost. See my earlier reply. You just need a very minimal driver that only takes care of the polarity thing. Nobody needs to see yet another GIC driver... M. -- Jazz is not dead. It just smells funny...