Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752484AbdLDSwW (ORCPT ); Mon, 4 Dec 2017 13:52:22 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:33024 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750854AbdLDSwU (ORCPT ); Mon, 4 Dec 2017 13:52:20 -0500 Date: Mon, 4 Dec 2017 10:52:15 -0800 From: "Paul E. McKenney" To: David Howells Cc: linux-kernel@vger.kernel.org, mingo@kernel.org, jiangshanlai@gmail.com, dipankar@in.ibm.com, akpm@linux-foundation.org, mathieu.desnoyers@efficios.com, josh@joshtriplett.org, tglx@linutronix.de, peterz@infradead.org, rostedt@goodmis.org, edumazet@google.com, fweisbec@gmail.com, oleg@redhat.com Subject: Re: [PATCH tip/core/rcu 01/21] doc: READ_ONCE() now implies smp_barrier_depends() Reply-To: paulmck@linux.vnet.ibm.com References: <1512157876-24665-1-git-send-email-paulmck@linux.vnet.ibm.com> <20171201195053.GA23494@linux.vnet.ibm.com> <15076.1512401936@warthog.procyon.org.uk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <15076.1512401936@warthog.procyon.org.uk> User-Agent: Mutt/1.5.21 (2010-09-15) X-TM-AS-GCONF: 00 x-cbid: 17120418-0048-0000-0000-0000020FA372 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008152; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000243; SDB=6.00955410; UDB=6.00482869; IPR=6.00735448; BA=6.00005727; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00018343; XFM=3.00000015; UTC=2017-12-04 18:52:16 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17120418-0049-0000-0000-0000435D0FA2 Message-Id: <20171204185215.GB7829@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-12-04_06:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1712040267 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2602 Lines: 65 On Mon, Dec 04, 2017 at 03:38:56PM +0000, David Howells wrote: > Paul E. McKenney wrote: > > > - Q = READ_ONCE(P); smp_read_barrier_depends(); D = READ_ONCE(*Q); > > + Q = READ_ONCE(P); D = READ_ONCE(*Q); > > > > the CPU will issue the following memory operations: > > > > Q = LOAD P, D = LOAD *Q > > The CPU may now issue two barriers in addition to the loads, so should we show > this? E.g.: > > Q = LOAD P, BARRIER, D = LOAD *Q, BARRIER Good point! How about as shown in the updated patch below? Thanx, Paul ------------------------------------------------------------------------ commit 40555946447a394889243e4393e312f65d847e1e Author: Paul E. McKenney Date: Mon Oct 9 09:15:21 2017 -0700 doc: READ_ONCE() now implies smp_barrier_depends() This commit updates an example in memory-barriers.txt to account for the fact that READ_ONCE() now implies smp_barrier_depends(). Signed-off-by: Paul E. McKenney [ paulmck: Added MEMORY_BARRIER instructions from DEC Alpha from READ_ONCE(), per David Howells's feedback. ] diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index 479ecec80593..13fd35b6a597 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt @@ -227,17 +227,20 @@ There are some minimal guarantees that may be expected of a CPU: (*) On any given CPU, dependent memory accesses will be issued in order, with respect to itself. This means that for: - Q = READ_ONCE(P); smp_read_barrier_depends(); D = READ_ONCE(*Q); + Q = READ_ONCE(P); D = READ_ONCE(*Q); the CPU will issue the following memory operations: Q = LOAD P, D = LOAD *Q - and always in that order. On most systems, smp_read_barrier_depends() - does nothing, but it is required for DEC Alpha. The READ_ONCE() - is required to prevent compiler mischief. Please note that you - should normally use something like rcu_dereference() instead of - open-coding smp_read_barrier_depends(). + and always in that order. However, on DEC Alpha, READ_ONCE() also + emits a memory-barrier instruction, so that a DEC Alpha CPU will + instead issue the following memory operations: + + Q = LOAD P, MEMORY_BARRIER, D = LOAD *Q, MEMORY_BARRIER + + Whether on DEC Alpha or not, the READ_ONCE() also prevents compiler + mischief. (*) Overlapping loads and stores within a particular CPU will appear to be ordered within that CPU. This means that for: