Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753260AbdLEKXL (ORCPT ); Tue, 5 Dec 2017 05:23:11 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:57174 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752783AbdLEKXJ (ORCPT ); Tue, 5 Dec 2017 05:23:09 -0500 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 48F6C60398 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=vivek.gautam@codeaurora.org Subject: Re: [PATCH v3 07/16] phy: qcom-qusb2: Add support for different register layouts To: Manu Gautam , Kishon Vijay Abraham I References: <1511256206-1587-1-git-send-email-mgautam@codeaurora.org> <1511256206-1587-8-git-send-email-mgautam@codeaurora.org> Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, Yoshihiro Shimoda , Stephen Boyd , "open list:GENERIC PHY FRAMEWORK" From: Vivek Gautam Message-ID: <3c0dca03-bf9e-8747-8c31-546172f88d6f@codeaurora.org> Date: Tue, 5 Dec 2017 15:53:04 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: <1511256206-1587-8-git-send-email-mgautam@codeaurora.org> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1262 Lines: 39 On 11/21/2017 02:53 PM, Manu Gautam wrote: > New version of QUSB2 PHY has some registers offset changed. > Add support to have register layout for a target and update > the same in phy_configuration. > > Signed-off-by: Manu Gautam > --- > drivers/phy/qualcomm/phy-qcom-qusb2.c | 131 ++++++++++++++++++++++++---------- > 1 file changed, 95 insertions(+), 36 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/phy-qcom-qusb2.c > index 4a5b2a1..c0c5358 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qusb2.c > +++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c [snip] > /* > @@ -198,7 +249,8 @@ static void qusb2_phy_set_tune2_param(struct qusb2_phy *qphy) We need to add following change to qusb2_phy_set_tune2_param() since we have register layout now. @@ -333,7 +334,7 @@ static void qusb2_phy_set_tune2_param(struct qusb2_phy *qphy) } /* Fused TUNE2 value is the higher nibble only */ - qusb2_setbits(qphy->base, QUSB2PHY_PORT_TUNE2, val[0] << 0x4); + qusb2_setbits(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE2], val[0] << 0x4); } regards Vivek -- The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project