Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751821AbdLFMEE (ORCPT ); Wed, 6 Dec 2017 07:04:04 -0500 Received: from mail-wr0-f193.google.com ([209.85.128.193]:41291 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750812AbdLFMEC (ORCPT ); Wed, 6 Dec 2017 07:04:02 -0500 X-Google-Smtp-Source: AGs4zMbXzTHQ78uvyR/K440ua+IIi6cC0QsODUiH47KjMzq7q9uO4UPF0SVMkTAAFWS/f5HQWFUbDw== Subject: Re: [RESEND PATCH 4/4] drm/meson: Add missing VPU init To: Chris Wilson Cc: linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org References: <1512561268-29806-1-git-send-email-narmstrong@baylibre.com> <1512561268-29806-5-git-send-email-narmstrong@baylibre.com> <151256172859.3497.16672223686685414318@mail.alporthouse.com> From: Neil Armstrong Organization: Baylibre Message-ID: <50101688-72c0-565e-bc15-9c229fd1a167@baylibre.com> Date: Wed, 6 Dec 2017 13:03:59 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <151256172859.3497.16672223686685414318@mail.alporthouse.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1909 Lines: 52 On 06/12/2017 13:02, Chris Wilson wrote: > Quoting Neil Armstrong (2017-12-06 11:54:28) >> The VPU init misses these configurations values. >> >> Signed-off-by: Neil Armstrong >> --- >> drivers/gpu/drm/meson/meson_drv.c | 9 +++++++++ >> drivers/gpu/drm/meson/meson_registers.h | 4 ++++ >> 2 files changed, 13 insertions(+) >> >> diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c >> index 3b804fd..f9ad0e9 100644 >> --- a/drivers/gpu/drm/meson/meson_drv.c >> +++ b/drivers/gpu/drm/meson/meson_drv.c >> @@ -151,6 +151,14 @@ static struct regmap_config meson_regmap_config = { >> .max_register = 0x1000, >> }; >> >> +static void meson_vpu_init(struct meson_drm *priv) >> +{ >> + writel_relaxed(0x210000, priv->io_base + _REG(VPU_RDARB_MODE_L1C1)); >> + writel_relaxed(0x10000, priv->io_base + _REG(VPU_RDARB_MODE_L1C2)); >> + writel_relaxed(0x900000, priv->io_base + _REG(VPU_RDARB_MODE_L2C1)); >> + writel_relaxed(0x20000, priv->io_base + _REG(VPU_WRARB_MODE_L2C1)); >> +} > >> diff --git a/drivers/gpu/drm/meson/meson_registers.h b/drivers/gpu/drm/meson/meson_registers.h >> index 2847381..bca8714 100644 >> --- a/drivers/gpu/drm/meson/meson_registers.h >> +++ b/drivers/gpu/drm/meson/meson_registers.h >> @@ -1363,6 +1363,10 @@ >> #define VPU_PROT3_STAT_1 0x277a >> #define VPU_PROT3_STAT_2 0x277b >> #define VPU_PROT3_REQ_ONOFF 0x277c >> +#define VPU_RDARB_MODE_L1C1 0x2790 >> +#define VPU_RDARB_MODE_L1C2 0x2799 > > Hmm, not naturally aligned for writel. Is the register width correct, > address correct, or this really is an unaligned iowrite? The registers are aligned with the documentation, then are used with the _REG() macro to align them with the bus (on top of the file). Neil > >> +#define VPU_RDARB_MODE_L2C1 0x279d >> +#define VPU_WRARB_MODE_L2C1 0x27a2 > > Similarly, > -Chris >