Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752126AbdLFMN7 (ORCPT ); Wed, 6 Dec 2017 07:13:59 -0500 Received: from mail-wr0-f180.google.com ([209.85.128.180]:38805 "EHLO mail-wr0-f180.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751827AbdLFMNz (ORCPT ); Wed, 6 Dec 2017 07:13:55 -0500 X-Google-Smtp-Source: AGs4zMa5TcnxKOmqSZdZny4vuyGBwalRBD2ZujwtZGNhPAuq9mOHdKy/V7tUGz167CczFlpvHF1hjQ== From: srinivas.kandagatla@linaro.org To: sboyd@codeaurora.org, linux-clk@vger.kernel.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH 0/2] clk: qcom: gcc-msm8916: codec digital clk fixes Date: Wed, 6 Dec 2017 12:11:37 +0000 Message-Id: <20171206121139.18936-1-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.15.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 454 Lines: 19 From: Srinivas Kandagatla Hi Stephen, Found few issues while trying to set 12.288MHz on codec digital clk. One is to do with missing mnd_width and other is missing clk entry. thanks, srini Srinivas Kandagatla (2): clk: qcom: msm8916: fix mnd_width for codec_digcodec clk: qcom: msm8916: add 12.288 MHz support to codec dig clk drivers/clk/qcom/gcc-msm8916.c | 2 ++ 1 file changed, 2 insertions(+) -- 2.15.0