Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753028AbdLFOrK (ORCPT ); Wed, 6 Dec 2017 09:47:10 -0500 Received: from mfo1500.tsb.2iij.net ([210.149.48.175]:56458 "EHLO mfo.tsb.2iij.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752050AbdLFOm5 (ORCPT ); Wed, 6 Dec 2017 09:42:57 -0500 X-MXL-Hash: 5a27fa87595620e5-ba6e8d720a5efcf4d00fd03654143bafa558a915 Content-Transfer-Encoding: 7bit From: KOBAYASHI Yoshitake To: boris.brezillon@free-electrons.com, richard@nod.at, dwmw2@infradead.org, computersforpeace@gmail.com, marek.vasut@gmail.com, cyrille.pitchen@wedev4u.fr, linux-mtd@lists.infradead.org Cc: linux-kernel@vger.kernel.org, KOBAYASHI Yoshitake Subject: [PATCH -next v3 1/2] mtd: nand: toshiba: Retrieve ECC requirements from extended ID Date: Wed, 6 Dec 2017 23:04:57 +0900 Message-Id: <1512569098-30038-2-git-send-email-yoshitake.kobayashi@toshiba.co.jp> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1512569098-30038-1-git-send-email-yoshitake.kobayashi@toshiba.co.jp> References: <1512569098-30038-1-git-send-email-yoshitake.kobayashi@toshiba.co.jp> X-MAIL-FROM: X-SOURCE-IP: [172.27.153.190] X-Spam: exempt Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1648 Lines: 52 This patch enables support to read the ECC strength and size from the NAND flash using Toshiba Memory SLC NAND extended-ID. This patch is based on the information of the 6th ID byte of the Toshiba Memory SLC NAND. Signed-off-by: KOBAYASHI Yoshitake --- drivers/mtd/nand/nand_toshiba.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/mtd/nand/nand_toshiba.c b/drivers/mtd/nand/nand_toshiba.c index 57df857..c2c141b 100644 --- a/drivers/mtd/nand/nand_toshiba.c +++ b/drivers/mtd/nand/nand_toshiba.c @@ -35,6 +35,34 @@ static void toshiba_nand_decode_id(struct nand_chip *chip) (chip->id.data[5] & 0x7) == 0x6 /* 24nm */ && !(chip->id.data[4] & 0x80) /* !BENAND */) mtd->oobsize = 32 * mtd->writesize >> 9; + + /* + * Extract ECC requirements from 6th id byte. + * For Toshiba SLC, ecc requrements are as follows: + * - 43nm: 1 bit ECC for each 512Byte is required. + * - 32nm: 4 bit ECC for each 512Byte is required. + * - 24nm: 8 bit ECC for each 512Byte is required. + */ + if (chip->id.len >= 6 && nand_is_slc(chip)) { + chip->ecc_step_ds = 512; + switch (chip->id.data[5] & 0x7) { + case 0x4: + chip->ecc_strength_ds = 1; + break; + case 0x5: + chip->ecc_strength_ds = 4; + break; + case 0x6: + chip->ecc_strength_ds = 8; + break; + default: + WARN(1, "Could not get ECC info"); + chip->ecc_step_ds = 0; + break; + } + } else if (chip->id.len < 6 && nand_is_slc(chip)) { + WARN(1, "Could not get ECC info, 6th nand id byte does not exist."); + } } static int toshiba_nand_init(struct nand_chip *chip) -- 2.7.4