Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752242AbdLFUT2 (ORCPT ); Wed, 6 Dec 2017 15:19:28 -0500 Received: from mail-by2nam03on0047.outbound.protection.outlook.com ([104.47.42.47]:31360 "EHLO NAM03-BY2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751544AbdLFUTV (ORCPT ); Wed, 6 Dec 2017 15:19:21 -0500 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Janakarajan.Natarajan@amd.com; Subject: Re: [PATCH v2 3/4] Add support for AMD Core Perf Extension in guest To: Radim Krcmar Cc: Borislav Petkov , Paolo Bonzini , kvm@vger.kernel.org, x86@kernel.org, linux-kernel@vger.kernel.org, Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" , Len Brown , Kyle Huey , Kan Liang , Grzegorz Andrejczuk , Tom Lendacky , Tony Luck References: <5113a9d6e76d2c6050c1fba4007068340321521c.1509985085.git.Janakarajan.Natarajan@amd.com> <20171109183425.rhqc5wrltznt5tcf@pd.tnic> <07f23e5e-2747-b0bc-1b93-f83f3982649a@amd.com> <20171115190755.5n2zskcr2d4bmewp@pd.tnic> <20171116172520.4lgdvpcdxuxenxc7@pd.tnic> <2c785f9f-faac-58d5-2efd-3fce80d24c18@amd.com> <20171117114445.iv2s7sm2mjqusztx@pd.tnic> <8ff957e3-67b7-3986-05ef-3e42bd7143f6@amd.com> <20171205175604.GA20099@flask> From: "Natarajan, Janakarajan" Message-ID: <3e3cfa15-8a92-56e4-008e-4d4734efce21@amd.com> Date: Wed, 6 Dec 2017 14:19:11 -0600 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <20171205175604.GA20099@flask> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US X-Originating-IP: [165.204.78.1] X-ClientProxiedBy: BN6PR08CA0075.namprd08.prod.outlook.com (10.172.143.141) To DM5PR12MB1675.namprd12.prod.outlook.com (10.172.40.144) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 93287f34-7938-4e5a-e761-08d53ce6a0f8 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(48565401081)(4534020)(4602075)(4627115)(201703031133081)(201702281549075)(5600026)(4604075)(2017052603286);SRVR:DM5PR12MB1675; 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So when the pmu is initialized the cpuid entries >>>> aren't available then. >>> So let's see: >>> >>> ... kvm_arch_vcpu_create() -> >>> svm_create_vcpu() -> >>> kvm_vcpu_init() -> >>> kvm_arch_vcpu_init() -> >>> >>> <--- HERE >>> >>> kvm_pmu_init() >>> >>> But at HERE in kvm_arch_vcpu_init() right before kvm_pmu_init() we do already query >>> cpuid: >>> >>> vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu); >>> >>> so it's not like we don't know about cpuid leafs at that point. Which >>> would mean that the code can be made to set the CPU family earlier, >>> before kvm_pmu_init() runs so that you have the proper CPU family and >>> thus have this thing properly designed. >>> >>> Maybe Paolo and Radim have a better suggestion here... >> Paolo, Radim any suggestions about this. I feel that the number of counters >> initialized can be 6 > This is the best solution with the current framework. Okay. > >> and the subsequent code (kvm_pmu_refresh()) takes care of the number of >> counters to be used (4 or 6) >> based on the vcpu family. > Can't we look only at X86_FEATURE_PERFCTR_CORE and completely ignore the > AMD family? > Using the family would bring problems with compatiblity. Yeah. We can just use the X86_FEATURE_PERFCTR_CORE flag as a check. I'll send a v3 with the changes. Thanks. > > Thanks.