Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752182AbdLGHKa (ORCPT ); Thu, 7 Dec 2017 02:10:30 -0500 Received: from mail-lf0-f54.google.com ([209.85.215.54]:43023 "EHLO mail-lf0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750784AbdLGHK2 (ORCPT ); Thu, 7 Dec 2017 02:10:28 -0500 X-Google-Smtp-Source: AGs4zMY7kFXsE7cN54QkFXM34mIa4ZbFQ21CrvvYIblTyEmgb+vxdglfbYFV1I3K9qtJAg1sbffiox6/nwDefG1/vdk= MIME-Version: 1.0 In-Reply-To: References: <1512582664-24936-1-git-send-email-jagan@amarulasolutions.com> From: Jagan Teki Date: Thu, 7 Dec 2017 12:40:25 +0530 Message-ID: Subject: Re: [PATCH 2/2] arm64: allwinner: a64: bananapi-m64: add usb otg To: Chen-Yu Tsai Cc: Maxime Ripard , Icenowy Zheng , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , Michael Trimarchi , linux-arm-kernel , devicetree , linux-kernel , linux-sunxi , Jagan Teki Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3139 Lines: 71 On Thu, Dec 7, 2017 at 12:31 PM, Chen-Yu Tsai wrote: > On Thu, Dec 7, 2017 at 2:54 PM, Jagan Teki wrote: >> On Thu, Dec 7, 2017 at 11:56 AM, Chen-Yu Tsai wrote: >>> On Thu, Dec 7, 2017 at 2:18 PM, Jagan Teki wrote: >>>> On Thu, Dec 7, 2017 at 8:54 AM, Chen-Yu Tsai wrote: >>>>> On Thu, Dec 7, 2017 at 1:51 AM, Jagan Teki wrote: >>>>>> usb otg on bananapi-m64 has configured with USB-ID with PH9 >>>>>> and USB-DRVVBUS attached with dcdc1 regulatort. >>>>> >>>>> That is not how you read the schematic... >>>>> >>>>> Intersecting lines that are tied together will have a dot representing >>>>> the connection. The DCDC1 line is a pull-up for the ID pin. This is very >>>>> clear because it has a resistor connected in series. >>>>> >>>>> VBUS for OTG is controlled by the IC displayed to the right in the >>>>> schematic, which is powered from 5V, and controlled by the DRVVBUS >>>>> pin from the PMIC. Please take a look at how the A31/A33/A83T board >>>>> dts files represent this. >>>> >>>> This is where I confused, USB-DRVVBUS is connected to pin 51 of PMIC >>>> if we add 5v regulator how can configure gpio number for this? I saw >>> >>> From the axp20x bindings: >>> >>> - x-powers,drive-vbus-en: boolean, set this when the N_VBUSEN pin is >>> used as an output pin to control an external >>> regulator to drive the OTG VBus, rather then >>> as an input pin which signals whether the >>> board is driving OTG VBus or not. >>> (axp221 / axp223 / axp813 only) >>> >>> Setting this allows you to use the "drivevbus" regulator under the PMIC. >>> As I said, look at how other boards are doing it. >>> >>>> sun8i-a33-olinuxino.dts which is also similar but it has gpio = <&pio >>>> 1 9 GPIO_ACTIVE_HIGH>; >>> >>> I have no idea where you saw this. It does not exist in my tree. >>> >>> Why don't you just trace backwards from the usb0_vbus-supply property >>> under the usbphy node, and see where it all leads. >> >> This what exactly I did, usb0_vbus-supply = <®_drivevbus>; on > > This is not what you did in your patch. > >> sun8i-a33-olinuxino.dts is using usb0-vbus from >> sunxi-common-regulators.dtsi. reg_usb0_vbus regulator using gpio9 >> which I couldn't find it on schematics. > > And I'm telling you that in mainline a33-olinuxino.dts it is: > > usb0_vbus-supply = <®_drivevbus>; > > It has been that way since the initial commit adding the file. > What tree are you looking at exactly? Take a good look at everything, > including your patch, and stop arguing. Sorry, you miss understand. I've seen a33-olinuxino and bananapi-m64 has similar connection in otg. Just trying to compare both and understand what I did different in my patch. Anyway thanks for your time I will send next version it will be worth discussing the same there. thanks! -- Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.