Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754334AbdLHPxT (ORCPT ); Fri, 8 Dec 2017 10:53:19 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:46812 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754207AbdLHPrg (ORCPT ); Fri, 8 Dec 2017 10:47:36 -0500 From: Alexandre Belloni To: Ralf Baechle Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, Alexandre Belloni , Linus Walleij , linux-gpio@vger.kernel.org Subject: [PATCH v2 04/13] dt-bindings: pinctrl: Add bindings for Microsemi Ocelot Date: Fri, 8 Dec 2017 16:46:09 +0100 Message-Id: <20171208154618.20105-5-alexandre.belloni@free-electrons.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171208154618.20105-1-alexandre.belloni@free-electrons.com> References: <20171208154618.20105-1-alexandre.belloni@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1905 Lines: 59 Add the documentation for the Microsemi Ocelot pinmuxing and gpio controller. Cc: Linus Walleij Cc: linux-gpio@vger.kernel.org Signed-off-by: Alexandre Belloni Acked-by: Rob Herring --- .../bindings/pinctrl/mscc,ocelot-pinctrl.txt | 39 ++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt diff --git a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt new file mode 100644 index 000000000000..24a210e0c59a --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt @@ -0,0 +1,39 @@ +Microsemi Ocelot pin controller Device Tree Bindings +---------------------------------------------------- + +Required properties: + - compatible : Should be "mscc,ocelot-pinctrl" + - reg : Address and length of the register set for the device + - gpio-controller : Indicates this device is a GPIO controller + - #gpio-cells : Must be 2. + The first cell is the pin number and the + second cell specifies GPIO flags, as defined in + . + - gpio-ranges : Range of pins managed by the GPIO controller. + + +The ocelot-pinctrl driver uses the generic pin multiplexing and generic pin +configuration documented in pinctrl-bindings.txt. + +The following generic properties are supported: + - function + - pins + +Example: + gpio: pinctrl@71070034 { + compatible = "mscc,ocelot-pinctrl"; + reg = <0x71070034 0x28>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&gpio 0 0 22>; + + uart_pins: uart-pins { + pins = "GPIO_6", "GPIO_7"; + function = "uart"; + }; + + uart2_pins: uart2-pins { + pins = "GPIO_12", "GPIO_13"; + function = "uart2"; + }; + }; -- 2.15.1