Date: Fri, 08 Dec 2017 14:19:07 -0500 (EST)
Message-Id: <20171208.141907.1804422023398223467.davem@davemloft.net>
To: niklas.cassel@axis.com
Cc: Joao.Pinto@synopsys.com, peppe.cavallaro@st.com,
        alexandre.torgue@st.com, niklass@axis.com, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH net-next] net: stmmac: fix broken dma_interrupt
 handling for multi-queues
From: David Miller <davem@davemloft.net>
In-Reply-To: <20171207225610.15572-1-niklas.cassel@axis.com>
References: <20171207225610.15572-1-niklas.cassel@axis.com>
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From: Niklas Cassel <niklas.cassel@axis.com>
Date: Thu,  7 Dec 2017 23:56:10 +0100

> There is nothing that says that number of TX queues == number of RX
> queues. E.g. the ARTPEC-6 SoC has 2 TX queues and 1 RX queue.
> 
> This code is obviously wrong:
> for (chan = 0; chan < tx_channel_count; chan++) {
>     struct stmmac_rx_queue *rx_q = &priv->rx_queue[chan];
> 
> priv->rx_queue has size MTL_MAX_RX_QUEUES, so this will send an
> uninitialized napi_struct to __napi_schedule(), causing us to
> crash in net_rx_action(), because napi_struct->poll is zero.
 ...
> Since each DMA channel can be used for rx and tx simultaneously,
> the current code should probably be rewritten so that napi_struct is
> embedded in a new struct stmmac_channel.
> That way, stmmac_poll() can call stmmac_tx_clean() on just the tx queue
> where we got the IRQ, instead of looping through all tx queues.
> This is also how the xgbe driver does it (another driver for this IP).
> 
> Fixes: c22a3f48ef99 ("net: stmmac: adding multiple napi mechanism")
> Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>

Applied, but indeed a lot more fixes are needed in this area.