Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752588AbdLKW0L (ORCPT ); Mon, 11 Dec 2017 17:26:11 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:56698 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752377AbdLKW0I (ORCPT ); Mon, 11 Dec 2017 17:26:08 -0500 DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org C553260A00 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=shankerd@codeaurora.org Reply-To: shankerd@codeaurora.org Subject: Re: [RESEND PATCH v4 2/2] arm64: Add software workaround for Falkor erratum 1041 To: Mark Rutland Cc: linux-efi@vger.kernel.org, Ard Biesheuvel , Marc Zyngier , Catalin Marinas , Will Deacon , linux-kernel@vger.kernel.org, Matt Fleming , Robin Murphy , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org References: <1512957823-18064-1-git-send-email-shankerd@codeaurora.org> <1512957823-18064-2-git-send-email-shankerd@codeaurora.org> <20171211104558.pm3lijsdfg2xhj7h@lakrids.cambridge.arm.com> From: Shanker Donthineni Message-ID: <39cc5f8d-be16-c437-28f8-1bc8601757af@codeaurora.org> Date: Mon, 11 Dec 2017 16:26:04 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <20171211104558.pm3lijsdfg2xhj7h@lakrids.cambridge.arm.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1865 Lines: 65 Thanks Mark, I'll post v5 patch without alternatives. On 12/11/2017 04:45 AM, Mark Rutland wrote: > Hi, > > On Sun, Dec 10, 2017 at 08:03:43PM -0600, Shanker Donthineni wrote: >> +/** >> + * Errata workaround prior to disable MMU. Insert an ISB immediately prior >> + * to executing the MSR that will change SCTLR_ELn[M] from a value of 1 to 0. >> + */ >> + .macro pre_disable_mmu_workaround >> +#ifdef CONFIG_QCOM_FALKOR_ERRATUM_E1041 >> +alternative_if ARM64_WORKAROUND_QCOM_FALKOR_E1041 >> + isb >> +alternative_else_nop_endif >> +#endif >> + .endm > > There's really no need for this to be an alternative. It makes the > kernel larger and more complex due to all the altinstr data and probing > code. > > As Will suggested last time [1], please just use the ifdef, and always > compile-in the extra ISB if CONFIG_QCOM_FALKOR_ERRATUM_E1041 is > selected. Get rid of the alternatives and probing code. > > All you need here is: > > /* > * Some Falkor parts make errant speculative instruction fetches > * when SCTLR_ELx.M is cleared. An ISB before the write to > * SCTLR_ELx prevents this. > */ > .macro pre_disable_mmu_workaround > #ifdef > isb > #endif > .endm > >> + >> + .macro pre_disable_mmu_early_workaround >> +#ifdef CONFIG_QCOM_FALKOR_ERRATUM_E1041 >> + isb >> +#endif >> + .endm >> + > > ... and we don't need a special early variant. > > Thanks, > Mark. > > [1] https://lkml.kernel.org/r/20171201112457.GE18083@arm.com > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > -- Shanker Donthineni Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project.