Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752312AbdLLGMW (ORCPT ); Tue, 12 Dec 2017 01:12:22 -0500 Received: from mail-pf0-f196.google.com ([209.85.192.196]:34438 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751547AbdLLGMM (ORCPT ); Tue, 12 Dec 2017 01:12:12 -0500 X-Google-Smtp-Source: ACJfBotY0gnjVhUrUUa/SYvQywZhStw6BDl86+hdANC/WcJHTmAlzXdhuItF5cvat3sHuQK3OFi7+w== From: Rick Chen To: rickchen36@gmail.com, rick@andestech.com, linux-kernel@vger.kernel.org, arnd@arndb.de, linus.walleij@linaro.org, daniel.lezcano@linaro.org, linux-arch@vger.kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, robh+dt@kernel.org, netdev@vger.kernel.org, deanbo422@gmail.com, devicetree@vger.kernel.org, viro@zeniv.linux.org.uk, dhowells@redhat.com, will.deacon@arm.com, linux-serial@vger.kernel.org Cc: Vincent Chen , Greentime Hu Subject: [PATCH v5 2/3] clocksource/drivers/atcpit100: VDSO support Date: Tue, 12 Dec 2017 13:47:00 +0800 Message-Id: <1513057621-19084-3-git-send-email-rickchen36@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1513057621-19084-1-git-send-email-rickchen36@gmail.com> References: <1513057621-19084-1-git-send-email-rickchen36@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1486 Lines: 54 VDSO needs real-time cycle count to ensure the time accuracy. Unlike others, nds32 architecture does not define clock source, hence VDSO needs atcpit100 offering real-time cycle count to derive the correct time. Signed-off-by: Vincent Chen Signed-off-by: Rick Chen Signed-off-by: Greentime Hu --- drivers/clocksource/timer-atcpit100.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/clocksource/timer-atcpit100.c b/drivers/clocksource/timer-atcpit100.c index 0077fdb..1be6c0a 100644 --- a/drivers/clocksource/timer-atcpit100.c +++ b/drivers/clocksource/timer-atcpit100.c @@ -29,6 +29,9 @@ #include #include #include "timer-of.h" +#ifdef CONFIG_NDS32 +#include +#endif /* * Definition of register offsets @@ -211,6 +214,14 @@ static u64 notrace atcpit100_timer_sched_read(void) return ~readl(timer_of_base(&to) + CH1_CNT); } +#ifdef CONFIG_NDS32 +static void fill_vdso_need_info(void) +{ + timer_info.cycle_count_down = true; + timer_info.cycle_count_reg_offset = CH1_CNT; +} +#endif + static int __init atcpit100_timer_init(struct device_node *node) { int ret; @@ -249,6 +260,10 @@ static int __init atcpit100_timer_init(struct device_node *node) val = readl(base + INT_EN); writel(val | CH0INT0EN, base + INT_EN); +#ifdef CONFIG_NDS32 + fill_vdso_need_info(); +#endif + return ret; } -- 2.7.4