Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752295AbdLLJM6 (ORCPT ); Tue, 12 Dec 2017 04:12:58 -0500 Received: from mail-pg0-f68.google.com ([74.125.83.68]:35868 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750955AbdLLJMz (ORCPT ); Tue, 12 Dec 2017 04:12:55 -0500 X-Google-Smtp-Source: ACJfBouiEw541lItaXilFyybxKohB/yU/AQgUJMyfX726b5He6WPIpSPgwcOwAJdjoSiPJNWu7ws3Q== From: Leo Yan To: Wei Xu , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Leo Yan , Vincent Guittot , Daniel Lezcano , Sudeep Holla , Soby Mathew Subject: [PATCH v2] arm64: dts: Hi3660: Fix up psci state id Date: Tue, 12 Dec 2017 17:12:33 +0800 Message-Id: <1513069954-22827-1-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3223 Lines: 82 Thanks a lot for Vincent Guittot careful work to find bug for 'CPU_NAP' idle state. From ftrace log we can observe CA73 CPUs can be easily waken up from 'CPU_NAP' state but the 'waken up' CPUs doesn't handle anything and sleep again; so there have tons of trace events for CA73 CPUs entering and exiting idle state. On Hi3660 CA73 has retention state 'CPU_NAP' for CPU idle, this state we set its psci parameter as '0x0000001' and from this parameter it can calculate state id is 1. Unfortunately ARM trusted firmware (ARM-TF) takes 1 as a invalid value for state id, so the CPU cannot enter idle state and directly bail out to kernel. We want to create good practice for psci parameters platform definition, so review the psci specification. The spec "ARM Power State Coordination Interface - Platform Design Document (ARM DEN 0022D)" recommends state ID in chapter "6.5 Recommended StateID Encoding". The recommended power state IDs can be presented by below listed values; and it divides into three fields, every field can use 4 bits to present power states corresponding to core level, cluster level and system level: 0: Run 1: Standby 2: Retention 3: Powerdown This commit changes psci parameter to compliance with the suggested state ID in the doc. Except we change 'CPU_NAP' state psci parameter to '0x0000002', this commit also changes 'CPU_SLEEP' and 'CLUSTER_SLEEP' state parameters to '0x0010003' and '0x1010033' respectively. Credits to Daniel, Sudeep and Soby for suggestion and consolidation. Cc: Vincent Guittot Cc: Daniel Lezcano Cc: Sudeep Holla Cc: Soby Mathew Signed-off-by: Leo Yan --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index ab0b95b..99d5a46 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -147,7 +147,7 @@ CPU_NAP: cpu-nap { compatible = "arm,idle-state"; - arm,psci-suspend-param = <0x0000001>; + arm,psci-suspend-param = <0x0000002>; entry-latency-us = <7>; exit-latency-us = <2>; min-residency-us = <15>; @@ -156,7 +156,7 @@ CPU_SLEEP: cpu-sleep { compatible = "arm,idle-state"; local-timer-stop; - arm,psci-suspend-param = <0x0010000>; + arm,psci-suspend-param = <0x0010003>; entry-latency-us = <40>; exit-latency-us = <70>; min-residency-us = <3000>; @@ -165,7 +165,7 @@ CLUSTER_SLEEP_0: cluster-sleep-0 { compatible = "arm,idle-state"; local-timer-stop; - arm,psci-suspend-param = <0x1010000>; + arm,psci-suspend-param = <0x1010033>; entry-latency-us = <500>; exit-latency-us = <5000>; min-residency-us = <20000>; @@ -174,7 +174,7 @@ CLUSTER_SLEEP_1: cluster-sleep-1 { compatible = "arm,idle-state"; local-timer-stop; - arm,psci-suspend-param = <0x1010000>; + arm,psci-suspend-param = <0x1010033>; entry-latency-us = <1000>; exit-latency-us = <5000>; min-residency-us = <20000>; -- 2.7.4