Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752598AbdLLSLF (ORCPT ); Tue, 12 Dec 2017 13:11:05 -0500 Received: from mail.kernel.org ([198.145.29.99]:46544 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751554AbdLLSLC (ORCPT ); Tue, 12 Dec 2017 13:11:02 -0500 DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 88C6620837 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=luto@kernel.org X-Google-Smtp-Source: ACJfBoti7lWxhoSGkLyZAc6IntKtzeD0EGiLfazXmiTO1sJR/rMe2/GGCcmogly1A9V46aBP/NYjJSRBHoCkB9ygtjk= MIME-Version: 1.0 In-Reply-To: <20171212180918.lc5fdk5jyzwmrcxq@hirez.programming.kicks-ass.net> References: <20171212173221.496222173@linutronix.de> <20171212173334.176469949@linutronix.de> <20171212180918.lc5fdk5jyzwmrcxq@hirez.programming.kicks-ass.net> From: Andy Lutomirski Date: Tue, 12 Dec 2017 10:10:40 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [patch 11/16] x86/ldt: Force access bit for CS/SS To: Peter Zijlstra Cc: Andy Lutomirski , Thomas Gleixner , LKML , X86 ML , Linus Torvalds , Dave Hansen , Borislav Petkov , Greg KH , Kees Cook , Hugh Dickins , Brian Gerst , Josh Poimboeuf , Denys Vlasenko , Boris Ostrovsky , Juergen Gross , David Laight , Eduardo Valentin , aliguori@amazon.com, Will Deacon , "linux-mm@kvack.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1179 Lines: 29 On Tue, Dec 12, 2017 at 10:09 AM, Peter Zijlstra wrote: > On Tue, Dec 12, 2017 at 10:03:02AM -0800, Andy Lutomirski wrote: >> On Tue, Dec 12, 2017 at 9:32 AM, Thomas Gleixner wrote: > >> > @@ -171,6 +172,9 @@ static void exit_to_usermode_loop(struct >> > /* Disable IRQs and retry */ >> > local_irq_disable(); >> > >> > + if (cached_flags & _TIF_LDT) >> > + ldt_exit_user(regs); >> >> Nope. To the extent that this code actually does anything (which it >> shouldn't since you already forced the access bit), > > Without this; even with the access bit set; IRET will go wobbly and > we'll #GP on the user-space side. Try it ;-) Maybe later. But that means that we need Intel and AMD to confirm WTF is going on before this blows up even with LAR on some other CPU. > >> it's racy against >> flush_ldt() from another thread, and that race will be exploitable for >> privilege escalation. It needs to be outside the loopy part. > > The flush_ldt (__ldt_install after these patches) would re-set the TIF > flag. But sure, we can move this outside the loop I suppose.