Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752766AbdLLWvs (ORCPT ); Tue, 12 Dec 2017 17:51:48 -0500 Received: from mga11.intel.com ([192.55.52.93]:48676 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752712AbdLLWvm (ORCPT ); Tue, 12 Dec 2017 17:51:42 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,395,1508828400"; d="scan'208";a="12927059" Message-ID: <1513120080.11361.12.camel@megha-Z97X-UD7-TH> Subject: Re: [PATCH V2 2/3] perf/x86/intel/bm.c: Add Intel Branch Monitoring support From: Megha Dey To: Peter Zijlstra Cc: x86@kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, andriy.shevchenko@linux.intel.com, kstewart@linuxfoundation.org, yu-cheng.yu@intel.com, len.brown@intel.com, gregkh@linuxfoundation.org, acme@kernel.org, alexander.shishkin@linux.intel.com, jolsa@redhat.com, namhyung@kernel.org, vikas.shivappa@linux.intel.com, pombredanne@nexb.com, me@kylehuey.com, bp@suse.de, grzegorz.andrejczuk@intel.com, tony.luck@intel.com, corbet@lwn.net, ravi.v.shankar@intel.com Date: Tue, 12 Dec 2017 15:08:00 -0800 In-Reply-To: <20171212223253.wtvei7i6fz2h3dpn@hirez.programming.kicks-ass.net> References: <1510970046-25387-1-git-send-email-megha.dey@linux.intel.com> <1510970046-25387-3-git-send-email-megha.dey@linux.intel.com> <20171120115714.hden247iet4bf2t5@hirez.programming.kicks-ass.net> <1513113057.11361.7.camel@megha-Z97X-UD7-TH> <20171212223253.wtvei7i6fz2h3dpn@hirez.programming.kicks-ass.net> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1704 Lines: 46 On Tue, 2017-12-12 at 23:32 +0100, Peter Zijlstra wrote: > On Tue, Dec 12, 2017 at 01:10:57PM -0800, Megha Dey wrote: > > On Mon, 2017-11-20 at 12:57 +0100, Peter Zijlstra wrote: > > > On Fri, Nov 17, 2017 at 05:54:05PM -0800, Megha Dey wrote: > > > > + mutex_lock(&bm_counter_mutex); > > > > + for (i = 0; i < BM_MAX_COUNTERS; i++) { > > > > + if (bm_counter_owner[i] == NULL) { > > > > + counter_to_use = i; > > > > + bm_counter_owner[i] = event; > > > > + break; > > > > + } > > > > + } > > > > + mutex_unlock(&bm_counter_mutex); > > > > + > > > > + if (counter_to_use == -1) > > > > + return -EBUSY; > > > > > > > +static struct pmu intel_bm_pmu = { > > > > + .task_ctx_nr = perf_sw_context, > > > > + .attr_groups = intel_bm_attr_groups, > > > > + .event_init = intel_bm_event_init, > > > > + .add = intel_bm_event_add, > > > > + .del = intel_bm_event_del, > > > > +}; > > > > > > Still horrid.. still no. > > > > It seems like perf_invalid_context does not support per task monitoring: > > find_get_context(): > > ctxn = pmu->task_ctx_nr; > > if (ctxn < 0) > > goto errout; > > > > Also, perf_hw_context is to be used only for core PMU, correct? > > > > That leaves us with only perf_sw_context to be used. Not sure if a new > > context needs to be implemented. > > There's work on the way to allow multiple HW PMUs. You'll either have to > wait for that or help in making that happen. What you do not do is > silently hack around it. Could I get a pointer to the code implementing this? I assume that this patch cannot be accepted until there is a way to allow multiple HW PMUs even if appropriate comments are added?