Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753400AbdLNPSx (ORCPT ); Thu, 14 Dec 2017 10:18:53 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:43376 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753029AbdLNPSu (ORCPT ); Thu, 14 Dec 2017 10:18:50 -0500 Date: Thu, 14 Dec 2017 15:18:58 +0000 From: Will Deacon To: Stephen Boyd Cc: Catalin Marinas , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v3] arm64: cpu_errata: Add Kryo to Falkor 1003 errata Message-ID: <20171214151858.GH4527@arm.com> References: <20171213221937.28065-1-sboyd@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20171213221937.28065-1-sboyd@codeaurora.org> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 748 Lines: 18 On Wed, Dec 13, 2017 at 02:19:37PM -0800, Stephen Boyd wrote: > The Kryo CPUs are also affected by the Falkor 1003 errata, so > we need to do the same workaround on Kryo CPUs. The MIDR is > slightly more complicated here, where the PART number is not > always the same when looking at all the bits from 15 to 4. Drop > the lower 8 bits and just look at the top 4 to see if it's '2' > and then consider those as Kryo CPUs. This covers all the > combinations without having to list them all out. > > Fixes: 38fd94b0275c ("arm64: Work around Falkor erratum 1003") > Signed-off-by: Stephen Boyd > --- Acked-by: Will Deacon Thanks for respinning this. Catalin -- can you take this for 4.16, please? Will