Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932126AbdLOWHq (ORCPT ); Fri, 15 Dec 2017 17:07:46 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:47254 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756538AbdLOWHm (ORCPT ); Fri, 15 Dec 2017 17:07:42 -0500 Date: Fri, 15 Dec 2017 23:07:41 +0100 From: Alexandre Belloni To: Rob Herring Cc: Ralf Baechle , linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Sebastian Reichel , linux-pm@vger.kernel.org Subject: Re: [PATCH v2 07/13] dt-bindings: power: reset: Document ocelot-reset binding Message-ID: <20171215220741.GE7022@piout.net> References: <20171208154618.20105-1-alexandre.belloni@free-electrons.com> <20171208154618.20105-8-alexandre.belloni@free-electrons.com> <20171215202332.bn47da3fpkynusno@rob-hp-laptop> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20171215202332.bn47da3fpkynusno@rob-hp-laptop> User-Agent: Mutt/1.9.1 (2017-09-22) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1819 Lines: 53 On 15/12/2017 at 14:23:32 -0600, Rob Herring wrote: > On Fri, Dec 08, 2017 at 04:46:12PM +0100, Alexandre Belloni wrote: > > Add binding documentation for the Microsemi Ocelot reset block. > > > > Cc: Rob Herring > > Cc: devicetree@vger.kernel.org > > Cc: Sebastian Reichel > > Cc: linux-pm@vger.kernel.org > > Signed-off-by: Alexandre Belloni > > --- > > .../devicetree/bindings/power/reset/ocelot-reset.txt | 17 +++++++++++++++++ > > 1 file changed, 17 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/power/reset/ocelot-reset.txt > > > > diff --git a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt > > new file mode 100644 > > index 000000000000..1bcf276b04cb > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt > > @@ -0,0 +1,17 @@ > > +Microsemi Ocelot reset controller > > + > > +The DEVCPU_GCB:CHIP_REGS have a SOFT_RST register that can be used to reset the > > +SoC MIPS core. > > + > > +Required Properties: > > + - compatible: "mscc,ocelot-chip-reset" > > + > > +Example: > > + syscon@71070000 { > > + compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon"; > > + reg = <0x71070000 0x1c>; > > + > > + reset { > > + compatible = "mscc,ocelot-chip-reset"; > > Why do you need a subnode here other than as a way to instantiate a > driver? Can you describe the SOFT_RST register in reg property here > (without having overlapping regions)? You mean like: reset@7107001c { compatible = "mscc,ocelot-chip-reset"; reg = <0x7107001c 0x4>; }; I guess that could work. -- Alexandre Belloni, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com