Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757305AbdLQQ7d (ORCPT ); Sun, 17 Dec 2017 11:59:33 -0500 Received: from mail-io0-f194.google.com ([209.85.223.194]:37644 "EHLO mail-io0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752225AbdLQQ7b (ORCPT ); Sun, 17 Dec 2017 11:59:31 -0500 X-Google-Smtp-Source: ACJfBos6fKlO24fxPw/jHmr3BTTkhYiLd0i2zsao8YtSiXolW2s3QPLS3czoxsIci96N9V04Pl2dwyAjMouH7dMGsgE= MIME-Version: 1.0 In-Reply-To: <20171208154618.20105-1-alexandre.belloni@free-electrons.com> References: <20171208154618.20105-1-alexandre.belloni@free-electrons.com> From: PrasannaKumar Muralidharan Date: Sun, 17 Dec 2017 22:29:30 +0530 Message-ID: Subject: Re: [PATCH v2 00/13] MIPS: add support for the Microsemi MIPS SoCs To: Alexandre Belloni Cc: Ralf Baechle , linux-mips@linux-mips.org, open list , Rob Herring , devicetree@vger.kernel.org, Thomas Gleixner , Jason Cooper , Linus Walleij , linux-gpio@vger.kernel.org, Sebastian Reichel , linux-pm@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 4643 Lines: 103 Hi Alexandre, With very small amount of code in arch/mips this series looks really nice. On 8 December 2017 at 21:16, Alexandre Belloni wrote: > Hi, > > This patch series adds initial support for the Microsemi MIPS SoCs. It > is currently focusing on the Microsemi Ocelot (VSC7513, VSC7514). > > It adds support for the IRQ controller, pinmux and gpio controller and > reset control. > > This produces a kernel that can boot to the console. > > This is a single series for reference but it can also be taken > separately by each maintainer as each drivers are independant. > > Changes in v2: > - removed the wildcard in MAINAINERS > - corrected the Cc list > - added proper documentation for both syscons > - removed the mscc,cpucontrol property > - updated the ranges property in the ocelot dtsi > > Cc: Rob Herring > Cc: devicetree@vger.kernel.org > Cc: Thomas Gleixner > Cc: Jason Cooper > Cc: Linus Walleij > Cc: linux-gpio@vger.kernel.org > Cc: Sebastian Reichel > Cc: linux-pm@vger.kernel.org > > > Alexandre Belloni (13): > dt-bindings: Add vendor prefix for Microsemi Corporation > dt-bindings: interrupt-controller: Add binding for the Microsemi > Ocelot interrupt controller > irqchip: Add a driver for the Microsemi Ocelot controller > dt-bindings: pinctrl: Add bindings for Microsemi Ocelot > pinctrl: Add Microsemi Ocelot SoC driver > dt-bindings: mips: Add bindings for Microsemi SoCs > dt-bindings: power: reset: Document ocelot-reset binding > power: reset: Add a driver for the Microsemi Ocelot reset > MIPS: mscc: Add initial support for Microsemi MIPS SoCs > MIPS: mscc: add ocelot dtsi > MIPS: mscc: add ocelot PCB123 device tree > MIPS: defconfigs: add a defconfig for Microsemi SoCs > MAINTAINERS: Add entry for Microsemi MIPS SoCs > > .../interrupt-controller/mscc,ocelot-icpu-intr.txt | 22 + > Documentation/devicetree/bindings/mips/mscc.txt | 46 ++ > .../bindings/pinctrl/mscc,ocelot-pinctrl.txt | 39 ++ > .../bindings/power/reset/ocelot-reset.txt | 17 + > .../devicetree/bindings/vendor-prefixes.txt | 1 + > MAINTAINERS | 7 + > arch/mips/Kbuild.platforms | 1 + > arch/mips/Kconfig | 24 + > arch/mips/boot/dts/Makefile | 1 + > arch/mips/boot/dts/mscc/Makefile | 6 + > arch/mips/boot/dts/mscc/ocelot.dtsi | 115 +++++ > arch/mips/boot/dts/mscc/ocelot_pcb123.dts | 27 ++ > arch/mips/configs/mscc_defconfig | 84 ++++ > arch/mips/mscc/Makefile | 11 + > arch/mips/mscc/Platform | 12 + > arch/mips/mscc/setup.c | 106 +++++ > drivers/irqchip/Kconfig | 5 + > drivers/irqchip/Makefile | 1 + > drivers/irqchip/irq-mscc-ocelot.c | 109 +++++ > drivers/pinctrl/Kconfig | 10 + > drivers/pinctrl/Makefile | 1 + > drivers/pinctrl/pinctrl-ocelot.c | 505 +++++++++++++++++++++ > drivers/power/reset/Kconfig | 7 + > drivers/power/reset/Makefile | 1 + > drivers/power/reset/ocelot-reset.c | 86 ++++ > 25 files changed, 1244 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.txt > create mode 100644 Documentation/devicetree/bindings/mips/mscc.txt > create mode 100644 Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt > create mode 100644 Documentation/devicetree/bindings/power/reset/ocelot-reset.txt > create mode 100644 arch/mips/boot/dts/mscc/Makefile > create mode 100644 arch/mips/boot/dts/mscc/ocelot.dtsi > create mode 100644 arch/mips/boot/dts/mscc/ocelot_pcb123.dts > create mode 100644 arch/mips/configs/mscc_defconfig > create mode 100644 arch/mips/mscc/Makefile > create mode 100644 arch/mips/mscc/Platform > create mode 100644 arch/mips/mscc/setup.c > create mode 100644 drivers/irqchip/irq-mscc-ocelot.c > create mode 100644 drivers/pinctrl/pinctrl-ocelot.c > create mode 100644 drivers/power/reset/ocelot-reset.c > > -- > 2.15.1 > > Except for irqchip driver and pinctrl driver other parts of the series is Reviewed-by: PrasannaKumar Muralidharan Regards, PrasannaKumar