Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932248AbdLQUhd (ORCPT ); Sun, 17 Dec 2017 15:37:33 -0500 Received: from mail.kmu-office.ch ([178.209.48.109]:38825 "EHLO mail.kmu-office.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757380AbdLQUh2 (ORCPT ); Sun, 17 Dec 2017 15:37:28 -0500 From: Stefan Agner To: shawnguo@kernel.org, kernel@pengutronix.de Cc: fabio.estevam@nxp.com, robh+dt@kernel.org, mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Stefan Agner Subject: [PATCH v2 2/9] ARM: dts: imx7-colibri: make sure multiplexed pins are not active Date: Sun, 17 Dec 2017 21:37:16 +0100 Message-Id: <20171217203723.15896-2-stefan@agner.ch> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171217203723.15896-1-stefan@agner.ch> References: <20171217203723.15896-1-stefan@agner.ch> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 826 Lines: 31 The Colibri pins PWM and are multiplexed on the module, make sure the secondary SoC pin is not active. Signed-off-by: Stefan Agner Reviewed-by: Fabio Estevam --- arch/arm/boot/dts/imx7-colibri.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 60ea7557d8c9..dae6b561145b 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -507,6 +507,7 @@ pinctrl_pwm1: pwm1-grp { fsl,pins = < MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 + MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 >; }; @@ -525,6 +526,7 @@ pinctrl_pwm4: pwm4-grp { fsl,pins = < MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 + MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 >; }; -- 2.15.1