Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757649AbdLRGY2 (ORCPT ); Mon, 18 Dec 2017 01:24:28 -0500 Received: from mail-wm0-f65.google.com ([74.125.82.65]:44035 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750769AbdLRGY0 (ORCPT ); Mon, 18 Dec 2017 01:24:26 -0500 X-Google-Smtp-Source: ACJfBouVmVF5Zikm2DhqfGHM6W8qXvgNv70UFp9tX4vGnX5uKvRTDOcEjFnhO0JH2z/W8tt9PURNjA== Subject: Re: [PATCH 1/1] arm: sunxi: Add alternative pins for spi0 To: Maxime Ripard Cc: Stefan Mavrodiev , linux-sunxi@googlegroups.com, Rob Herring , Mark Rutland , Russell King , Chen-Yu Tsai , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM PORT" , open list References: <1513151074-6888-1-git-send-email-stefan@olimex.com> <20171213154035.qc655iahjoeflftq@flea.lan> <5f518e4b-e624-17c2-7e72-24ba930a1c15@gmail.com> <20171215150823.jplgknururmkvp2t@flea.lan> From: Stefan Mavrodiev Organization: Olimex Ltd. Message-ID: Date: Mon, 18 Dec 2017 08:24:21 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <20171215150823.jplgknururmkvp2t@flea.lan> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1000 Lines: 29 On 12/15/2017 05:08 PM, Maxime Ripard wrote: > Hi, > > On Thu, Dec 14, 2017 at 08:24:54AM +0200, Stefan Mavrodiev wrote: >> On 12/13/2017 05:40 PM, Maxime Ripard wrote: >>> Hi, >>> >>> On Wed, Dec 13, 2017 at 09:44:34AM +0200, Stefan Mavrodiev wrote: >>>> Allwinner A10/A13/A20 SoCs have pinmux for spi0 >>>> on port C. The patch adds these pins in the respective >>>> dts includes. >>>> >>>> Signed-off-by: Stefan Mavrodiev >>> Do you have any boards that are using these? >>> >>> We won't merge that patch if there's no users for it. >> A20-OLinuXino-Lime/Lime2 and A10-OLinuXino-Lime with spi flash. >> For A13 we still doesn't have that option. > If this bus is exposed on the headers, you can add those to the DT but > leave them disabled if you want. Buf if there's no users of those > nodes, our policy is not to merge them. So basically I should resend the patch, enabling the those pins only for sun4i and sun7i platform? > > Thanks! > Maxime > Regards, Stefan Mavrodiev