Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932996AbdLRHOH (ORCPT ); Mon, 18 Dec 2017 02:14:07 -0500 Received: from mail-pl0-f67.google.com ([209.85.160.67]:39179 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932261AbdLRHOC (ORCPT ); Mon, 18 Dec 2017 02:14:02 -0500 X-Google-Smtp-Source: ACJfBouAUwzPi1ysKp88SBmIZWXO6CFT/kJoS7/EdSjbA0xBzBo4+dfOBhAL9/uh0Y9XzaPHLWyMug== From: Greentime Hu To: greentime@andestech.com, linux-kernel@vger.kernel.org, arnd@arndb.de, linux-arch@vger.kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, robh+dt@kernel.org, netdev@vger.kernel.org, deanbo422@gmail.com, devicetree@vger.kernel.org, viro@zeniv.linux.org.uk, dhowells@redhat.com, will.deacon@arm.com, daniel.lezcano@linaro.org, linux-serial@vger.kernel.org, geert.uytterhoeven@gmail.com, linus.walleij@linaro.org, mark.rutland@arm.com, greg@kroah.com, ren_guo@c-sky.com, pombredanne@nexb.com Cc: green.hu@gmail.com, Vincent Chen , Rick Chen , Zong Li Subject: [PATCH v4 29/36] dt-bindings: nds32 CPU Bindings Date: Mon, 18 Dec 2017 14:46:41 +0800 Message-Id: <4d249ac85d1f71e60051b2f00e572f3b9fc3280b.1513577007.git.green.hu@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1580 Lines: 59 From: Greentime Hu This patch adds nds32 CPU binding documents. Signed-off-by: Vincent Chen Signed-off-by: Rick Chen Signed-off-by: Zong Li Signed-off-by: Greentime Hu Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/nds32/cpus.txt | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/nds32/cpus.txt diff --git a/Documentation/devicetree/bindings/nds32/cpus.txt b/Documentation/devicetree/bindings/nds32/cpus.txt new file mode 100644 index 0000000..9a52937 --- /dev/null +++ b/Documentation/devicetree/bindings/nds32/cpus.txt @@ -0,0 +1,37 @@ +* Andestech Processor Binding + +This binding specifies what properties must be available in the device tree +representation of a Andestech Processor Core, which is the root node in the +tree. + +Required properties: + + - compatible: + Usage: required + Value type: + Definition: should be one of: + "andestech,n13" + "andestech,n15" + "andestech,d15" + "andestech,n10" + "andestech,d10" + "andestech,nds32v3" + - device_type + Usage: required + Value type: + Definition: must be "cpu" + - reg: Contains CPU index. + - clock-frequency: Contains the clock frequency for CPU, in Hz. + +* Examples + +/ { + cpus { + cpu@0 { + device_type = "cpu"; + compatible = "andestech,n13", "andestech,nds32v3"; + reg = <0x0>; + clock-frequency = <60000000> + }; + }; +}; -- 1.7.9.5