Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758916AbdLRMXV (ORCPT ); Mon, 18 Dec 2017 07:23:21 -0500 Received: from smtp2200-217.mail.aliyun.com ([121.197.200.217]:47183 "EHLO smtp2200-217.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758680AbdLRMXS (ORCPT ); Mon, 18 Dec 2017 07:23:18 -0500 X-Alimail-AntiSpam: AC=CONTINUE;BC=0.07710236|-1;CH=green;FP=0|0|0|0|0|-1|-1|-1;HT=e01e04463;MF=ren_guo@c-sky.com;NM=1;PH=DS;RN=22;RT=22;SR=0;TI=SMTPD_---.9luK6DN_1513599774; Date: Mon, 18 Dec 2017 20:22:54 +0800 From: Guo Ren To: Greentime Hu Cc: Greentime , Linux Kernel Mailing List , Arnd Bergmann , linux-arch , Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , netdev , Vincent Chen , DTML , Al Viro , David Howells , Will Deacon , Daniel Lezcano , linux-serial@vger.kernel.org, Geert Uytterhoeven , Linus Walleij , Mark Rutland , Greg KH , Vincent Chen Subject: Re: [PATCH v3 07/33] nds32: MMU initialization Message-ID: <20171218122253.GA19382@gary-OptiPlex-3050> References: <0964714c3dcac46ac700085717b0f414b7978112.1512723245.git.green.hu@gmail.com> <20171218090848.GA5823@gary-OptiPlex-3050> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1469 Lines: 47 On Mon, Dec 18, 2017 at 07:21:30PM +0800, Greentime Hu wrote: > Hi, Guo Ren: > > 2017-12-18 17:08 GMT+08:00 Guo Ren : > > Hi Greentime, > > > > On Fri, Dec 08, 2017 at 05:11:50PM +0800, Greentime Hu wrote: > > [...] > >> > >> diff --git a/arch/nds32/mm/highmem.c b/arch/nds32/mm/highmem.c > > [...] > >> +void *kmap(struct page *page) > >> +{ > >> + unsigned long vaddr; > >> + might_sleep(); > >> + if (!PageHighMem(page)) > >> + return page_address(page); > >> + vaddr = (unsigned long)kmap_high(page); > > Here should invalid the cpu_mmu_tlb's entry, Or invalid it in the > > set_pte(). > > > > eg: > > vaddr0 = kmap(page0) > > *vaddr0 = val0 //It will cause tlb-miss, and hard-refill to MMU-tlb > > kunmap(page0) > > vaddr1 = kmap(page1) // Mostly vaddr1 = vaddr0 > > val = vaddr1; //No tlb-miss and it will get page0's val not page1, because > > last expired vaddr0's entry is left in CPU-MMU-tlb. > > > > Thanks. > I will add __nds32__tlbop_inv(vaddr); to invalidate this mapping > before retrun vaddr. Sorry, perhaps I'm wrong. See kmap->kmap_high->map_new_virtual->get_next_pkmap_nr(color). Seems pkmap will return the vaddr by vaddr + 1 until no_more_pkmaps(), and then flush_all_zero_pkmaps. Just kmap_atomic need it, and you've done. But I don't know why mips need flush_tlb_one in arch/mips/mm/highmem.c:kmap(). VIPT? but kmap give the get_pkmap_color for aliasing. Best Regards Guo Ren