Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758204AbdLROFU (ORCPT ); Mon, 18 Dec 2017 09:05:20 -0500 Received: from mail-ot0-f194.google.com ([74.125.82.194]:34803 "EHLO mail-ot0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752867AbdLROFR (ORCPT ); Mon, 18 Dec 2017 09:05:17 -0500 X-Google-Smtp-Source: ACJfBosudTSdCMFa9HtgFzFATNiYgVtUA/lkFJbJa09hn0BbZmF0lJdS65XgwxeGFa5sE3Y0UG7eSU4owBFKTKmDmBw= MIME-Version: 1.0 In-Reply-To: References: <29198c0a-783e-8aa0-00e4-44b1fa1acef7@infradead.org> <1513322656-4571-1-git-send-email-dshah@xilinx.com> <1513322656-4571-3-git-send-email-dshah@xilinx.com> From: Arnd Bergmann Date: Mon, 18 Dec 2017 15:05:15 +0100 X-Google-Sender-Auth: KdhRb8DM7sKYemKwrEzp78W7rX0 Message-ID: Subject: Re: [PATCH v4 2/2] misc: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver To: Michal Simek Cc: Dhaval Shah , gregkh , Rob Herring , Mark Rutland , Randy Dunlap , DTML , Linux Kernel Mailing List , Hyun Kwon , Dhaval Shah Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1724 Lines: 36 On Mon, Dec 18, 2017 at 2:13 PM, Michal Simek wrote: > On 15.12.2017 14:26, Arnd Bergmann wrote: >> In Fri, Dec 15, 2017 at 8:24 AM, Dhaval Shah wrote: >>> Xilinx ZYNQMP logicoreIP Init driver is based on the new >>> LogiCoreIP design created. This driver provides the processing system >>> and programmable logic isolation. Set the frequency based on the clock >>> information get from the logicoreIP register set. >>> >>> It is put in drivers/misc as there is no subsystem for this logicoreIP. >>> >>> Signed-off-by: Dhaval Shah >> >> After giving this some more thought, I'd suggest you move the driver to >> drivers/soc/xilinx or drivers/soc/zynq instead of drivers/misc/, and have >> it merged by Michal Simek as a driver patch that will go through arm-soc. > > I have not a problem of creating drivers/soc/xilinx/ location for this > driver. It is not zynq (arm32) but zynqmp(arm64) device where this > driver can be used. As far as I understand it is memory mapped soft IP > which could be also accessed by soft core CPU. Ok. I wouldn't be worried about having a zynq directory for stuff that is common between zynq and zynqmp, but the soft code CPU case wouldn't make that ideal. > It means drivers/soc/xilinx could be shared by all xilinx platforms anyway. > We have been discussing that openrisc cases and for sure if someone > wants to enable this driver there using misc location would be one > option but I also think that using drivers/soc/xilinx location is not a > bad option because it is very unlikely that anybody tries it. > > Arnd: misc or drivers/soc/xilinx? drivers/soc/xilinx please, thanks for the clarification. Arnd