Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754219AbdLTDh4 (ORCPT ); Tue, 19 Dec 2017 22:37:56 -0500 Received: from mail-lf0-f65.google.com ([209.85.215.65]:45327 "EHLO mail-lf0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752103AbdLTDhx (ORCPT ); Tue, 19 Dec 2017 22:37:53 -0500 X-Google-Smtp-Source: ACJfBovHwGQ5+wmxQYsuc/zPVuJMB99NSQNMUZI0J9OUtsejhEMnNv7HGwCM6031brWhWpZCe4ix/Mcomw3KCIjs2vU= MIME-Version: 1.0 In-Reply-To: <20171220032328.30584-1-joel@jms.id.au> References: <20171220032328.30584-1-joel@jms.id.au> From: Joel Stanley Date: Wed, 20 Dec 2017 14:07:30 +1030 X-Google-Sender-Auth: Zh0OaK_oLDNwnUfWRY9-thewfHM Message-ID: Subject: Re: [PATCH v3 00/19] ARM: dts: aspeed: updates and new machines To: Arnd Bergmann , Stephen Boyd , Michael Turquette , Rob Herring Cc: =?UTF-8?Q?C=C3=A9dric_Le_Goater?= , Benjamin Herrenschmidt , Jeremy Kerr , devicetree , Andrew Jeffery , Linux ARM , Linux Kernel Mailing List , linux-aspeed@lists.ozlabs.org, Patrick Venture , Xo Wang , Lei YU , Mark Rutland Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 886 Lines: 23 On Wed, Dec 20, 2017 at 1:53 PM, Joel Stanley wrote: > This series of device tree patches for the ASPEED BMC machines > moves all systems to use the soon to be merged clk driver, and > updates machines to use all of the drivers we have upstream. > > v3: Address review from Rob and Cedric > - Move aspeed-gpio.h usage out into the patches where use of the GPIO > is added > - Clarify that the aspeed-clock.h patch will be merged as part of > the device tree tree. This is to ensure we don't depend on the clk > tree for building. Arnd, Michael, Stephen; how do we resolve this? We need the dt-bindings header to be present for both the clk driver and the device tree to build. The clk driver is not (yet - soon I hope?) merged by Michael and Stephen. I am about to commit the device tree changes that will go through the ARM SoC tree. Cheers, Joel