Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932135AbdLTRHn (ORCPT ); Wed, 20 Dec 2017 12:07:43 -0500 Received: from mail-io0-f193.google.com ([209.85.223.193]:37616 "EHLO mail-io0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755849AbdLTRHl (ORCPT ); Wed, 20 Dec 2017 12:07:41 -0500 X-Google-Smtp-Source: ACJfBos/qTSjH9wPGuIstqaBjtCS4l3B3VQQnLUnAb7jBhUSZ+X2DQaj7gE311izVKZOHiBlbAB5LNMGgjr7j1mIr5k= MIME-Version: 1.0 In-Reply-To: <1513771538-41693-4-git-send-email-pbonzini@redhat.com> References: <1513771538-41693-1-git-send-email-pbonzini@redhat.com> <1513771538-41693-4-git-send-email-pbonzini@redhat.com> From: Jim Mattson Date: Wed, 20 Dec 2017 09:07:39 -0800 Message-ID: Subject: Re: [PATCH 3/3] KVM: VMX: introduce X2APIC_MSR macro To: Paolo Bonzini Cc: LKML , kvm list , David Hildenbrand Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 3046 Lines: 74 Reviewed-by: Jim Mattson On Wed, Dec 20, 2017 at 4:05 AM, Paolo Bonzini wrote: > Remove duplicate expression in nested_vmx_prepare_msr_bitmap, and make > the register names clearer in hardware_setup. > > Suggested-by: Jim Mattson > Signed-off-by: Paolo Bonzini > --- > arch/x86/kvm/vmx.c | 19 +++++++++---------- > 1 file changed, 9 insertions(+), 10 deletions(-) > > diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c > index 905aaa778306..65e09096a5ab 100644 > --- a/arch/x86/kvm/vmx.c > +++ b/arch/x86/kvm/vmx.c > @@ -5256,6 +5256,8 @@ static void pt_disable_intercept_for_msr(bool flag) > } > } > > +#define X2APIC_MSR(r) (APIC_BASE_MSR + ((r) >> 4)) > + > static void vmx_disable_intercept_msr_x2apic(u32 msr, int type, bool apicv_active) > { > if (apicv_active) { > @@ -7136,7 +7138,7 @@ static __init int hardware_setup(void) > set_bit(0, vmx_vpid_bitmap); /* 0 is reserved for host */ > > for (msr = 0x800; msr <= 0x8ff; msr++) { > - if (msr == 0x839 /* TMCCT */) > + if (msr == X2APIC_MSR(APIC_TMCCT)) > continue; > vmx_disable_intercept_msr_x2apic(msr, MSR_TYPE_R, true); > } > @@ -7145,12 +7147,9 @@ static __init int hardware_setup(void) > * TPR reads and writes can be virtualized even if virtual interrupt > * delivery is not in use. > */ > - vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_R | MSR_TYPE_W, false); > - > - /* EOI */ > - vmx_disable_intercept_msr_x2apic(0x80b, MSR_TYPE_W, true); > - /* SELF-IPI */ > - vmx_disable_intercept_msr_x2apic(0x83f, MSR_TYPE_W, true); > + vmx_disable_intercept_msr_x2apic(X2APIC_MSR(APIC_TASKPRI), MSR_TYPE_R | MSR_TYPE_W, false); > + vmx_disable_intercept_msr_x2apic(X2APIC_MSR(APIC_EOI), MSR_TYPE_W, true); > + vmx_disable_intercept_msr_x2apic(X2APIC_MSR(APIC_SELF_IPI), MSR_TYPE_W, true); > > if (enable_ept) > vmx_enable_tdp(); > @@ -10344,17 +10343,17 @@ static inline bool nested_vmx_prepare_msr_bitmap(struct kvm_vcpu *vcpu, > > nested_vmx_disable_intercept_for_msr( > msr_bitmap_l1, msr_bitmap_l0, > - APIC_BASE_MSR + (APIC_TASKPRI >> 4), > + X2APIC_MSR(APIC_TASKPRI), > MSR_TYPE_W); > > if (nested_cpu_has_vid(vmcs12)) { > nested_vmx_disable_intercept_for_msr( > msr_bitmap_l1, msr_bitmap_l0, > - APIC_BASE_MSR + (APIC_EOI >> 4), > + X2APIC_MSR(APIC_EOI), > MSR_TYPE_W); > nested_vmx_disable_intercept_for_msr( > msr_bitmap_l1, msr_bitmap_l0, > - APIC_BASE_MSR + (APIC_SELF_IPI >> 4), > + X2APIC_MSR(APIC_SELF_IPI), > MSR_TYPE_W); > } > kunmap(page); > -- > 1.8.3.1 >