Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753520AbdLULvm (ORCPT ); Thu, 21 Dec 2017 06:51:42 -0500 Received: from mail-wr0-f196.google.com ([209.85.128.196]:38158 "EHLO mail-wr0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753296AbdLULvK (ORCPT ); Thu, 21 Dec 2017 06:51:10 -0500 X-Google-Smtp-Source: ACJfBot4KB85beInpa/PgcHtv2KZb234lzZA+ILd63HlMk9OytGGB3cQUmiySmpWbeGdX0Z8SxyRng== From: Paolo Bonzini To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org Cc: jmattson@google.com, david@redhat.com Subject: [PATCH 2/3] KVM: vmx: simplify MSR bitmap setup Date: Thu, 21 Dec 2017 12:51:01 +0100 Message-Id: <1513857062-44013-3-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1513857062-44013-1-git-send-email-pbonzini@redhat.com> References: <1513857062-44013-1-git-send-email-pbonzini@redhat.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1637 Lines: 47 The APICv-enabled MSR bitmap passes through all MSRs in the APICv-disabled bitmap (and then some). Make that obvious in vmx_disable_intercept_msr_x2apic. Signed-off-by: Paolo Bonzini --- v1->v2: included the right version of the patch arch/x86/kvm/vmx.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 2b27afc93cb4..68239aabec52 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -5257,14 +5257,13 @@ static void pt_disable_intercept_for_msr(bool flag) } } -static void vmx_disable_intercept_msr_x2apic(u32 msr, int type, bool apicv_active) +static void vmx_disable_intercept_msr_x2apic(u32 msr, int type, bool apicv_only) { - if (apicv_active) { - __vmx_disable_intercept_for_msr(vmx_msr_bitmap_legacy_x2apic_apicv, - msr, type); - __vmx_disable_intercept_for_msr(vmx_msr_bitmap_longmode_x2apic_apicv, - msr, type); - } else { + __vmx_disable_intercept_for_msr(vmx_msr_bitmap_legacy_x2apic_apicv, + msr, type); + __vmx_disable_intercept_for_msr(vmx_msr_bitmap_longmode_x2apic_apicv, + msr, type); + if (!apicv_only) { __vmx_disable_intercept_for_msr(vmx_msr_bitmap_legacy_x2apic, msr, type); __vmx_disable_intercept_for_msr(vmx_msr_bitmap_longmode_x2apic, @@ -7149,7 +7148,6 @@ static __init int hardware_setup(void) * TPR reads and writes can be virtualized even if virtual interrupt * delivery is not in use. */ - vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_W, true); vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_R | MSR_TYPE_W, false); /* EOI */ -- 1.8.3.1