Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751712AbdLUOsB convert rfc822-to-8bit (ORCPT ); Thu, 21 Dec 2017 09:48:01 -0500 Received: from smtp-out4.electric.net ([192.162.216.181]:63855 "EHLO smtp-out4.electric.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750757AbdLUOr4 (ORCPT ); Thu, 21 Dec 2017 09:47:56 -0500 From: David Laight To: "'Peter Zijlstra'" CC: "'Crt Mori'" , Jonathan Cameron , "Ingo Molnar" , Andrew Morton , "Kees Cook" , Rusty Russell , "Ian Abbott" , Larry Finger , "Niklas Soderlund" , Thomas Gleixner , Krzysztof Kozlowski , Masahiro Yamada , "linux-kernel@vger.kernel.org" , "linux-iio@vger.kernel.org" , Joe Perches Subject: RE: [PATCH v10 1/3] lib: Add strongly typed 64bit int_sqrt Thread-Topic: [PATCH v10 1/3] lib: Add strongly typed 64bit int_sqrt Thread-Index: AQHTeZ24vj4uJGdJVEmg6EfyY0tMJ6NMSiFAgAAfCS+AAAbEMIAADUYAgAEwoOCAABsbgIAACUNggAAFxACAAAblEA== Date: Thu, 21 Dec 2017 14:48:14 +0000 Message-ID: <79658484b99a4f65bb3a1937b3d156ad@AcuMS.aculab.com> References: <20171220142001.18161-1-cmo@melexis.com> <1c1d0ffa8ee140bf9adbc78f1559b1e8@AcuMS.aculab.com> <20171220160001.manjff26gfbjccsw@hirez.programming.kicks-ass.net> <95b9b2b52554410a85a9f10c7f5e8b13@AcuMS.aculab.com> <20171221141130.cdng2mysnjj6j4i6@hirez.programming.kicks-ass.net> In-Reply-To: <20171221141130.cdng2mysnjj6j4i6@hirez.programming.kicks-ass.net> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.202.205.33] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-Outbound-IP: 156.67.243.126 X-Env-From: David.Laight@ACULAB.COM X-Proto: esmtps X-Revdns: X-HELO: AcuMS.aculab.com X-TLS: TLSv1.2:ECDHE-RSA-AES256-SHA384:256 X-Authenticated_ID: X-PolicySMART: 3396946, 3397078 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 787 Lines: 25 From: Peter Zijlstra > Sent: 21 December 2017 14:12 ... > > > This part above looks like FLS > > It also does the rest of the required shifts. > > Still, fls() + shift is way faster on hardware that has an fls > instruction. > > Writing out that binary search doesn't make sense. If the hardware doesn't have an appropriate fls instruction the soft fls()will be worse. If you used fls() you'd still need quite a bit of code to generate the correct shift and loop count adjustment. Given the cost of the loop iterations the 3 tests are noise. The open coded version is obviously correct... I didn't add the 4th one because the code always does 2 iterations. If you were really worried about performance there are faster algorithms (even doing 2 or 4 bits a time is faster). David