Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754523AbdLUQoi (ORCPT ); Thu, 21 Dec 2017 11:44:38 -0500 Received: from mail-qk0-f196.google.com ([209.85.220.196]:36149 "EHLO mail-qk0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752156AbdLUQog (ORCPT ); Thu, 21 Dec 2017 11:44:36 -0500 X-Google-Smtp-Source: ACJfBou9E8BnZNfaZaSe/bcmuepIugDGEXyf0g0LDi8l+TCfEyGVNzWj1swTnjS6gfIW04V6ls0zAQ== From: "Jingoo Han" To: "'Joao Pinto'" , "'Niklas Cassel'" , "'Lorenzo Pieralisi'" , "'Bjorn Helgaas'" Cc: "'Niklas Cassel'" , , References: <20171219232940.659-1-niklas.cassel@axis.com> <20171219232940.659-3-niklas.cassel@axis.com> <7308951d-5123-2ebf-1d11-27b4467625d9@synopsys.com> In-Reply-To: <7308951d-5123-2ebf-1d11-27b4467625d9@synopsys.com> Subject: Re: [PATCH v6 02/18] PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bits Date: Thu, 21 Dec 2017 11:44:33 -0500 Message-ID: <000101d37a7a$fb7209f0$f2561dd0$@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQIEUapv8u3tCtMjYHwXXPyqK47qBQIlUic8ARv+DzCi0kf5MA== Content-Language: en-us Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id vBLGihxv004165 Content-Length: 2008 Lines: 56 On Wednesday, December 20, 2017 2:18 PM, Joao Pinto wrote: > > Hi, > > Às 11:29 PM de 12/19/2017, Niklas Cassel escreveu: > > Previously, dw_pcie_ep_set_msi() wrote all bits in the Message Control > > register, thus overwriting the PCI_MSI_FLAGS_64BIT bit. > > By clearing the PCI_MSI_FLAGS_64BIT bit, we break MSI > > on systems where the RC has set a 64 bit MSI address. > > Fix dw_pcie_ep_set_msi() so that it only sets MMC bits. > > > > Signed-off-by: Niklas Cassel > > --- > > drivers/pci/dwc/pcie-designware-ep.c | 4 +++- > > drivers/pci/dwc/pcie-designware.h | 1 + > > 2 files changed, 4 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/pci/dwc/pcie-designware-ep.c > b/drivers/pci/dwc/pcie-designware-ep.c > > index d53d5f168363..c92ab87fd660 100644 > > --- a/drivers/pci/dwc/pcie-designware-ep.c > > +++ b/drivers/pci/dwc/pcie-designware-ep.c > > @@ -220,7 +220,9 @@ static int dw_pcie_ep_set_msi(struct pci_epc *epc, > u8 encode_int) > > struct dw_pcie_ep *ep = epc_get_drvdata(epc); > > struct dw_pcie *pci = to_dw_pcie_from_ep(ep); > > > > - val = (encode_int << MSI_CAP_MMC_SHIFT); > > + val = dw_pcie_readw_dbi(pci, MSI_MESSAGE_CONTROL); > > + val &= ~MSI_CAP_MMC_MASK; > > + val |= (encode_int << MSI_CAP_MMC_SHIFT) & MSI_CAP_MMC_MASK; > > dw_pcie_writew_dbi(pci, MSI_MESSAGE_CONTROL, val); > > > > return 0; > > diff --git a/drivers/pci/dwc/pcie-designware.h b/drivers/pci/dwc/pcie- > designware.h > > index ecdede68522a..9aaf0cd04dd6 100644 > > --- a/drivers/pci/dwc/pcie-designware.h > > +++ b/drivers/pci/dwc/pcie-designware.h > > @@ -101,6 +101,7 @@ > > > > #define MSI_MESSAGE_CONTROL 0x52 > > #define MSI_CAP_MMC_SHIFT 1 > > +#define MSI_CAP_MMC_MASK (7 << MSI_CAP_MMC_SHIFT) > > #define MSI_CAP_MME_SHIFT 4 > > #define MSI_CAP_MME_MASK (7 << MSI_CAP_MME_SHIFT) > > #define MSI_MESSAGE_ADDR_L32 0x54 > > > > Acked-by: Joao Pinto Acked-by: Jingoo Han Best regards, Jingoo Han