Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753175AbdLURSN (ORCPT ); Thu, 21 Dec 2017 12:18:13 -0500 Received: from resqmta-po-08v.sys.comcast.net ([96.114.154.167]:41216 "EHLO resqmta-po-08v.sys.comcast.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752244AbdLURSM (ORCPT ); Thu, 21 Dec 2017 12:18:12 -0500 X-Greylist: delayed 488 seconds by postgrey-1.27 at vger.kernel.org; Thu, 21 Dec 2017 12:18:12 EST Date: Thu, 21 Dec 2017 11:10:00 -0600 (CST) From: Christopher Lameter X-X-Sender: cl@nuc-kabylake To: kemi cc: Michal Hocko , Greg Kroah-Hartman , Andrew Morton , Vlastimil Babka , Mel Gorman , Johannes Weiner , YASUAKI ISHIMATSU , Andrey Ryabinin , Nikolay Borisov , Pavel Tatashin , David Rientjes , Sebastian Andrzej Siewior , Dave , Andi Kleen , Tim Chen , Jesper Dangaard Brouer , Ying Huang , Aaron Lu , Aubrey Li , Linux MM , Linux Kernel Subject: Re: [PATCH v2 3/5] mm: enlarge NUMA counters threshold size In-Reply-To: <268b1b6e-ff7a-8f1a-f97c-f94e14591975@intel.com> Message-ID: References: <1513665566-4465-1-git-send-email-kemi.wang@intel.com> <1513665566-4465-4-git-send-email-kemi.wang@intel.com> <20171219124045.GO2787@dhcp22.suse.cz> <439918f7-e8a3-c007-496c-99535cbc4582@intel.com> <20171220101229.GJ4831@dhcp22.suse.cz> <268b1b6e-ff7a-8f1a-f97c-f94e14591975@intel.com> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-CMAE-Envelope: MS4wfDC0z/Otrk4cNzIojlEBTGJo21+3TB8tYCOa2Ki/g14e3H6EIIwUQBg11GpHhFMsXcPgorQB6TesboYSmcubNLMbz17VjTyXtwHSu4kRs2jZfw55/LWP lxe2FzWbzpcRi9X+ukb9v49r4MJsrzaXf9P21Jj3BBLnbygkN/uJGiaUw+fvTmyDp6wtAIvXghLN3nlE3dKspaNHBL/kOiU7Fr4sPsDAbNYYkdsDsner5EiY 8sSOgERM/EODrmAWHtjjIeOF5ClWNrpD4YLdEn4A+o2D3P1UFzdTCbKdE1LRBxkPiIlBcdtoc0SbXcGYL9QOqrIFgrf9M0Ofm7JJlghyDtIjZ6Cv2RGfNQ0q n1KngP28tQ/ueV1uCzwPBpl7XxHXLXVQCniO84NYdtFtoBnFRrNCx9LHLytaz6uYdMpfoYuv8Ns8a9g69EYTafIv/UkRGwfd/6wO9SnIw8GTDnU+yFgcDUrH bKRXEODmVnO5rOKEIwmXvxfsvt7sFjlF3wjbw+dS776EPHLT8A3uYpzbc1jC3TSp1rKe92H4liQ0N6KZLmwl83KkgMmy1LDX6BN6SqvzVohYGbaDTqXA8wG9 SO+wsHeNS7oJy+2nkMsodbUjzo8qCQTZVOn11gpF2Z1mzYTIjuGG8SJnj+xoyqMLjtINy3vC2GCVQji/GDZ4CAb3Ym9osAOdVqX5hNVeyi0jirgBvbBrCTt8 Nmtq0wPLjj2hQ7AHQbBipHfX7YNMn08VNS4/96tLTvgiCEwAfL+8sc4NHvpzsNFnHztTBgDckwqEuaTcUDKCvZXAq4BLr3SM2HlsR2jZHzTdFt34tSORrlus Ln0FIxQTge/HD+tEgFvgRKcafRISvcgp0Pgbb2wr Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 868 Lines: 17 On Thu, 21 Dec 2017, kemi wrote: > Some thinking about that: > a) the overhead due to cache bouncing caused by NUMA counter update in fast path > severely increase with more and more CPUs cores > b) AFAIK, the typical usage scenario (similar at least)for which this optimization can > benefit is 10/40G NIC used in high-speed data center network of cloud service providers. I think you are fighting a lost battle there. As evident from the timing constraints on packet processing in a 10/40G you will have a hard time to process data if the packets are of regular ethernet size. And we alrady have 100G NICs in operation here. We can try to get the performance as high as possible but full rate high speed networking invariable must use offload mechanisms and thus the statistics would only be available from the hardware devices that can do wire speed processing.