Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755414AbdLVDPw (ORCPT ); Thu, 21 Dec 2017 22:15:52 -0500 Received: from mail.kernel.org ([198.145.29.99]:46554 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752766AbdLVDPt (ORCPT ); Thu, 21 Dec 2017 22:15:49 -0500 DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0A9B821890 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=helgaas@kernel.org Date: Thu, 21 Dec 2017 21:15:47 -0600 From: Bjorn Helgaas To: Honghui Zhang Cc: Yong Wu , youlin.pei@mediatek.com, devicetree@vger.kernel.org, hongkun.cao@mediatek.com, ryder.lee@mediatek.com, yu.yu@mediatek.com, linux-pci@vger.kernel.org, sean.wang@mediatek.com, linux-kernel@vger.kernel.org, yt.shen@mediatek.com, matthias.bgg@gmail.com, lorenzo.pieralisi@arm.com, linux-mediatek@lists.infradead.org, xinping.qian@mediatek.com, bhelgaas@google.com, yingjoe.chen@mediatek.com, eddie.huang@mediatek.com, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 2/2] PCI: mediatek: Fixup class type for MT7622 Message-ID: <20171222031546.GF30595@bhelgaas-glaptop.roam.corp.google.com> References: <1513822277-18329-1-git-send-email-honghui.zhang@mediatek.com> <1513822277-18329-3-git-send-email-honghui.zhang@mediatek.com> <1513838476.23174.3.camel@mhfsdcap03> <1513839672.25872.13.camel@mhfsdcap03> <20171222002712.GE30595@bhelgaas-glaptop.roam.corp.google.com> <1513904194.25872.23.camel@mhfsdcap03> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1513904194.25872.23.camel@mhfsdcap03> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 949 Lines: 22 On Fri, Dec 22, 2017 at 08:56:34AM +0800, Honghui Zhang wrote: > There's an internal control register that control the Vendor ID and > device ID values, our designer leave the default value un-touched. I > will set these values in that way for the next version of fix. Then there's no problem. The mtk_pcie driver is a platform driver that claims the host controller based on an of_device_id from a device tree. Apparently the bridge is also materialized in PCI config space, which is typical for x86 host bridges, and makes the bridge appear in "lspci". But drivers generally don't claim bridges that way. You can just program the Vendor and Device IDs by writing the internal control registers somewhere in the mtk_pci_probe() path. Then you can set the class code the same way, using an internal control register (if that's possible), or using a quirk with the correct Mediatek Vendor ID (if there is no internal writable register). Bjorn