Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758377AbdLVKCZ convert rfc822-to-8bit (ORCPT ); Fri, 22 Dec 2017 05:02:25 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:44737 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755901AbdLVKCQ (ORCPT ); Fri, 22 Dec 2017 05:02:16 -0500 From: Gregory CLEMENT To: Stephen Boyd Cc: Mike Turquette , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Thomas Petazzoni , linux-arm-kernel@lists.infradead.org, Antoine Tenart , =?utf-8?Q?Miqu=C3=A8l?= Raynal , Nadav Haklai , Victor Gu , Marcin Wojtas , Wilson Ding , Hua Jing , Neta Zur Hershkovits Subject: Re: [PATCH 0/3] Add DVFS support on CPU clock for Armada 37xx References: <20171130134029.20751-1-gregory.clement@free-electrons.com> <20171221231341.GC7997@codeaurora.org> Date: Fri, 22 Dec 2017 11:02:04 +0100 In-Reply-To: <20171221231341.GC7997@codeaurora.org> (Stephen Boyd's message of "Thu, 21 Dec 2017 15:13:41 -0800") Message-ID: <87shc3dqsj.fsf@free-electrons.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1953 Lines: 52 Hi Stephen, On jeu., déc. 21 2017, Stephen Boyd wrote: > On 11/30, Gregory CLEMENT wrote: >> Hi, >> >> This small series is needed to use DVFS on Armada 37xx. When DVFS is >> enabled the CPU clock setting is done using an other set of registers >> from the North Bridge Power Management block. >> >> The series adds the possibility to modify the CPU frequency using the >> associate load level matching the target frequency. However >> configuring the frequencies for each load is done by the cpufreq >> driver submitted in a separate series. >> >> Obviously having both series (cpufreq and clk) is needed to support >> DVFS on Armada 37xx, but there is no dependencies between the series >> (for building or at runtime). >> > > Are you relying on the clk API returning an error to detect if > DVFS is present or not? Just curious why that part of the code > was there. The cpufreq framework rely on the clk framwork to setup the clk frequency of the CPU. For this hardware when DVFS is enabled the we don't directly control the frequency of the CPUs but the "load level". And it is during the initialization that we associate CPU frequency to a load level. The clk part is there to setup this load level for the hardware but by still using the frequency as an entry point as it was what is expected by the kernel. So cpufreq will ask a frequency depending of its policy, then the clk driver will setup the load level matching this frequency. And to answer your specific question we don't rely on the clk API returning an error to detect if DVFS is present or not. For this we directly read the DVFS bit exposed through the syscon. Gregory > > -- > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, > a Linux Foundation Collaborative Project -- Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com