Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756620AbdLVQz5 (ORCPT ); Fri, 22 Dec 2017 11:55:57 -0500 Received: from mail-pf0-f178.google.com ([209.85.192.178]:40012 "EHLO mail-pf0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756451AbdLVQzz (ORCPT ); Fri, 22 Dec 2017 11:55:55 -0500 X-Google-Smtp-Source: ACJfBosvLbc/MkoA91H+yYA3sM8V0I1n0Du2v6nvPUN75nDIQTJiD1HQHtPzNX8Dt01X404WWSWXRYxSO7rxOr2oAFM= MIME-Version: 1.0 In-Reply-To: <20171222165308.10f2fe15@xps13> References: <20171221231904.21140-1-chris.packham@alliedtelesis.co.nz> <20171221231904.21140-2-chris.packham@alliedtelesis.co.nz> <20171222165308.10f2fe15@xps13> From: Ezequiel Garcia Date: Fri, 22 Dec 2017 13:55:54 -0300 Message-ID: Subject: Re: [PATCHv4 1/1] mtd: nand: pxa3xx: Set FORCE_CSX bit to ARMADA370 variants To: Miquel RAYNAL Cc: Chris Packham , Ezequiel Garcia , Boris Brezillon , Richard Weinberger , David Woodhouse , Brian Norris , Marek Vasut , Cyrille Pitchen , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Kalyan Kinthada Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id vBMGu0nN031655 Content-Length: 757 Lines: 22 On 22 December 2017 at 12:53, Miquel RAYNAL wrote: > Hello Chris, > > On Fri, 22 Dec 2017 12:19:04 +1300 > Chris Packham wrote: > >> From: Kalyan Kinthada >> >> The Armada-370 based SoCs support arbitration between the NAND Flash >> interface and NOR (i.e. devbus) on the same chip select. However there >> are two guidelines that must be followed to avoid data corruption in >> this scenario. > > Sorry to bother you again with that but, do you actually face any > issue/data corruption with this scenario? > Indeed. We need a description of a real world problem this patch is fixing. -- Ezequiel GarcĂ­a, VanguardiaSur www.vanguardiasur.com.ar