Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756877AbdLWPff (ORCPT ); Sat, 23 Dec 2017 10:35:35 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:57081 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752554AbdLWPfb (ORCPT ); Sat, 23 Dec 2017 10:35:31 -0500 X-UUID: 7e10de1d1368452bb961390b326b169d-20171223 Message-ID: <1514043318.30687.10.camel@mtkswgap22> Subject: Re: [PATCH] arm: dts: mt7623: enable all four available UARTs on bananapi-r2 From: Sean Wang To: Matthias Brugger CC: , , , , , Date: Sat, 23 Dec 2017 23:35:18 +0800 In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2701 Lines: 90 On Sat, 2017-12-23 at 08:52 +0100, Matthias Brugger wrote: > > On 12/22/2017 07:06 AM, sean.wang@mediatek.com wrote: > > From: Sean Wang > > > > On bpi-r2 board, totally there're four uarts which we usually called > > uart[0-3] helpful to extend slow I/O devices. Among those ones, uart2 has > > dedicated pin slot which is used to conolse log. uart[0-1] appear at the > > 40-pins connector and uart3 has no pinout, but just has test points (TP47 > > for TX and TP48 for RX, respectively) nearby uart2. Also, some missing > > pinctrl is being complemented for those devices. > > > > Signed-off-by: Sean Wang > > --- > > arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts | 26 ++++++++++++++++++++++++-- > > 1 file changed, 24 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts > > index 7bf5aa2..64bf5db 100644 > > --- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts > > +++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts > > @@ -409,6 +409,20 @@ > > ; > > }; > > }; > > + > > + uart2_pins_a: uart@2 { > > + pins_dat { > > + pinmux = , > > + ; > > + }; > > + }; > > + > > + uart3_pins_a: uart@3 { > > + pins_dat { > > + pinmux = , > > + ; > > + }; > > + }; > > }; > > > > &pwm { > > @@ -454,16 +468,24 @@ > > &uart0 { > > pinctrl-names = "default"; > > pinctrl-0 = <&uart0_pins_a>; > > - status = "disabled"; > > + status = "okay"; > > }; > > > > &uart1 { > > pinctrl-names = "default"; > > pinctrl-0 = <&uart1_pins_a>; > > - status = "disabled"; > > + status = "okay"; > > }; > > > > &uart2 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&uart2_pins_a>; > > + status = "okay"; > > +}; > > + > > +&uart3 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&uart3_pins_a>; > > status = "okay"; > > }; > > > > Why do we want to enable uart3 when there are only test points? > It is not very useful, or do I oversee something? > I have been listening to the sound from potential users of bpi-r2 to understand what assistance I have to provide to them. Something could be seen through [1] in the forum to know they had been trying hard to explore all available UARTs from the SoC in the last weeks. The patch should be really useful for these people and for the extra soldering it shouldn't become a problem for these makers. [1] http://forum.banana-pi.org/t/gpio-uart-not-the-debug-port/3748 Sean > Regards, > Matthias >