Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750898AbdLZKLr (ORCPT ); Tue, 26 Dec 2017 05:11:47 -0500 Received: from mail-eopbgr50077.outbound.protection.outlook.com ([40.107.5.77]:11360 "EHLO EUR03-VE1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750705AbdLZKLp (ORCPT ); Tue, 26 Dec 2017 05:11:45 -0500 From: Peng Fan To: Dong Aisheng CC: Shawn Guo , "A.s. Dong" , "linux-kernel@vger.kernel.org" , Russell King , Fabio Estevam , Sascha Hauer , "van.freenix@gmail.com" , "linux-arm-kernel@lists.infradead.org" Subject: RE: [PATCH] arm: imx: suspend/resume: use outer_disable/resume Thread-Topic: [PATCH] arm: imx: suspend/resume: use outer_disable/resume Thread-Index: AQHTca+I9uQpoIijsECS1wrrCngHnKNVb/AAgAAJzaCAAASEAIAAAZ9Q Date: Tue, 26 Dec 2017 10:11:41 +0000 Message-ID: References: <20171210120718.15197-1-peng.fan@nxp.com> <20171226091230.GP23070@X250> <20171226100344.GA11724@b29396-OptiPlex-7040> In-Reply-To: <20171226100344.GA11724@b29396-OptiPlex-7040> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; x-originating-ip: [92.121.68.129] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;AMSPR04MB310;7:VAkd0GdGPB0OGSIMmQOC9So6xJb8RXsE1mkFeMlB3NH7aYZBPvlPwHYTC7Ic2wv/cYj4ZwBTVYyC35ptP5DhmT0awch5wXDJnt0LYkK2u6Anz6ATUdz7G1VGAhbHRwLfUsEl5uE8en+VrLwqsjeYiFGhwzwC2EmJGvJ2l3ALV2AQAThVowKwOprJ1HHHhIrXVjj1WolfkSqfFnY0afP/KkHXLvhbu7UnDjDzMjMIi1xrHQI/1MGcxG9fEG+q1sal x-ms-exchange-antispam-srfa-diagnostics: SSOS;SSOR; x-forefront-antispam-report: SFV:SKI;SCL:-1;SFV:NSPM;SFS:(10009020)(366004)(396003)(39860400002)(376002)(39380400002)(346002)(13464003)(24454002)(51914003)(199004)(189003)(15650500001)(81156014)(25786009)(93886005)(8676002)(3280700002)(5660300001)(316002)(81166006)(6436002)(39060400002)(14454004)(9686003)(6246003)(478600001)(7696005)(97736004)(8936002)(2950100002)(229853002)(3660700001)(99286004)(54906003)(53936002)(102836004)(6916009)(55016002)(76176011)(74316002)(6506007)(66066001)(7736002)(86362001)(2900100001)(3846002)(6116002)(68736007)(53546011)(105586002)(106356001)(59450400001)(1411001)(2906002)(4326008)(33656002)(305945005)(5250100002);DIR:OUT;SFP:1101;SCL:1;SRVR:AMSPR04MB310;H:DB6PR04MB3221.eurprd04.prod.outlook.com;FPR:;SPF:None;PTR:InfoNoRecords;A:1;MX:1;LANG:en; x-ms-office365-filtering-correlation-id: 3ada163a-6078-4fc9-a1e8-08d54c490f53 x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:(4534020)(4602075)(4627115)(201703031133081)(201702281549075)(5600026)(4604075)(3008032)(48565401081)(2017052603307)(7153060);SRVR:AMSPR04MB310; x-ms-traffictypediagnostic: AMSPR04MB310: x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:(9452136761055)(185117386973197)(258649278758335); x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(6040470)(2401047)(8121501046)(5005006)(3231023)(944501075)(10201501046)(3002001)(93006095)(93001095)(6055026)(6041268)(201703131423095)(201702281528075)(20161123555045)(201703061421075)(201703061406153)(20161123562045)(20161123560045)(20161123558120)(20161123564045)(6072148)(201708071742011);SRVR:AMSPR04MB310;BCL:0;PCL:0;RULEID:(100000803101)(100110400095);SRVR:AMSPR04MB310; x-forefront-prvs: 053315510E x-microsoft-antispam-message-info: R7lw2vWklJMdj3M25siCzsvLzee498rUDZbBnVk3q0h3ftWqwzcz/29//RVcttoXjq1u1eD3xlGoBUqm7MbTcg== spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3ada163a-6078-4fc9-a1e8-08d54c490f53 X-MS-Exchange-CrossTenant-originalarrivaltime: 26 Dec 2017 10:11:41.5162 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: AMSPR04MB310 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by mail.home.local id vBQABrQ3027578 Content-Length: 3784 Lines: 109 Hi Aisheng, > -----Original Message----- > From: Dong Aisheng [mailto:dongas86@gmail.com] > Sent: Tuesday, December 26, 2017 6:04 PM > To: Peng Fan > Cc: Shawn Guo ; A.s. Dong ; > linux-kernel@vger.kernel.org; Russell King ; Fabio > Estevam ; Sascha Hauer ; > van.freenix@gmail.com; linux-arm-kernel@lists.infradead.org > Subject: Re: [PATCH] arm: imx: suspend/resume: use outer_disable/resume > > On Tue, Dec 26, 2017 at 09:49:01AM +0000, Peng Fan wrote: > > Hi Shawn > > > > > -----Original Message----- > > > From: Shawn Guo [mailto:shawnguo@kernel.org] > > > Sent: Tuesday, December 26, 2017 5:13 PM > > > To: Peng Fan > > > Cc: A.s. Dong ; linux-kernel@vger.kernel.org; > > > Russell King ; Fabio Estevam > > > ; Sascha Hauer ; > > > van.freenix@gmail.com; linux-arm- kernel@lists.infradead.org > > > Subject: Re: [PATCH] arm: imx: suspend/resume: use > > > outer_disable/resume > > > > > > On Sun, Dec 10, 2017 at 08:07:18PM +0800, Peng Fan wrote: > > > > Use outer_disable/resume for suspend/resume. > > > > With the two APIs used, code could be simplified and easy to > > > > extend to introduce l2c_write_sec for i.MX platforms when moving > > > > Linux Kernel runs in non-secure world. > > > > > > > > Signed-off-by: Peng Fan > > > > Cc: Shawn Guo > > > > Cc: Sascha Hauer > > > > Cc: Fabio Estevam > > > > Cc: Russell King > > > > Cc: Dong Aisheng > > > > > > Changed 'arm: ' prefix to 'ARM: ', and applied patch. > > > > I just tested it on 6sx-sdb, seems this patch breaks 6sx. Could you > > first drop this patch? I'll send out v2 fix the 6sx issue soon. > > > > Yes, i tested mx6ul/mx6sl ok but mx6sx sdb failed. Thanks for the test. > > After a few debug, it seems you removed the l2c310_early_resume in > v7_cpu_resume which is shared between lower power idle and suspend. > > Current only mx6sx/mx6ul supports low power idle in upstream, but mx6ul is > A7 with internal L2, that's probably why only mx6sx showed the issue. > > I did the following quick try to restore L2 after exit lower power idle, but still > can meet occasional crash during booting. > > diff --git a/arch/arm/mach-imx/cpuidle-imx6sx.c b/arch/arm/mach- > imx/cpuidle-imx6sx.c > index c5a5c3a..edce5bd 100644 > --- a/arch/arm/mach-imx/cpuidle-imx6sx.c > +++ b/arch/arm/mach-imx/cpuidle-imx6sx.c > @@ -26,7 +26,7 @@ static int imx6sx_idle_finish(unsigned long val) > * to adding conditional code for L2 cache type, > * just call flush_cache_all() is fine. > */ > - flush_cache_all(); > +// flush_cache_all(); I think flush_cache_all is still needed, to flush L1 data, right? > cpu_do_idle(); > > return 0; > @@ -49,7 +49,9 @@ static int imx6sx_enter_wait(struct cpuidle_device *dev, > cpu_pm_enter(); > cpu_cluster_pm_enter(); > > + outer_disable(); > cpu_suspend(0, imx6sx_idle_finish); > + outer_resume(); Yes, this is in my V2 patch. > > cpu_cluster_pm_exit(); > cpu_pm_exit(); > > As this changed the order to L2 restore and cpu resume, so i'm not quite sure if > lower power idle still requres L2 restore before CPU resume or something else > we're missing. In low power idle, L2 may also lose power, so outer_disable/resume is needed, I think. Thanks, Peng. > > Regards > Dong Aisheng > > > Thanks, > > Peng. > > > > > > > > Shawn