Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750977AbdLZKUs (ORCPT ); Tue, 26 Dec 2017 05:20:48 -0500 Received: from mail-pf0-f195.google.com ([209.85.192.195]:36901 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750744AbdLZKUr (ORCPT ); Tue, 26 Dec 2017 05:20:47 -0500 X-Google-Smtp-Source: ACJfBouky44snxx1klQKwy324XvAWP6NQX2ziZM1GtSnfoUeNIHDoO5+p1I+Kn6p19M1G4KD3tG5AA== Date: Tue, 26 Dec 2017 18:20:38 +0800 From: Dong Aisheng To: Peng Fan Cc: Shawn Guo , "A.s. Dong" , "linux-kernel@vger.kernel.org" , Russell King , Fabio Estevam , Sascha Hauer , "van.freenix@gmail.com" , "linux-arm-kernel@lists.infradead.org" Subject: Re: [PATCH] arm: imx: suspend/resume: use outer_disable/resume Message-ID: <20171226102038.GB11724@b29396-OptiPlex-7040> References: <20171210120718.15197-1-peng.fan@nxp.com> <20171226091230.GP23070@X250> <20171226100344.GA11724@b29396-OptiPlex-7040> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 4182 Lines: 119 On Tue, Dec 26, 2017 at 10:11:41AM +0000, Peng Fan wrote: > > Hi Aisheng, > > > -----Original Message----- > > From: Dong Aisheng [mailto:dongas86@gmail.com] > > Sent: Tuesday, December 26, 2017 6:04 PM > > To: Peng Fan > > Cc: Shawn Guo ; A.s. Dong ; > > linux-kernel@vger.kernel.org; Russell King ; Fabio > > Estevam ; Sascha Hauer ; > > van.freenix@gmail.com; linux-arm-kernel@lists.infradead.org > > Subject: Re: [PATCH] arm: imx: suspend/resume: use outer_disable/resume > > > > On Tue, Dec 26, 2017 at 09:49:01AM +0000, Peng Fan wrote: > > > Hi Shawn > > > > > > > -----Original Message----- > > > > From: Shawn Guo [mailto:shawnguo@kernel.org] > > > > Sent: Tuesday, December 26, 2017 5:13 PM > > > > To: Peng Fan > > > > Cc: A.s. Dong ; linux-kernel@vger.kernel.org; > > > > Russell King ; Fabio Estevam > > > > ; Sascha Hauer ; > > > > van.freenix@gmail.com; linux-arm- kernel@lists.infradead.org > > > > Subject: Re: [PATCH] arm: imx: suspend/resume: use > > > > outer_disable/resume > > > > > > > > On Sun, Dec 10, 2017 at 08:07:18PM +0800, Peng Fan wrote: > > > > > Use outer_disable/resume for suspend/resume. > > > > > With the two APIs used, code could be simplified and easy to > > > > > extend to introduce l2c_write_sec for i.MX platforms when moving > > > > > Linux Kernel runs in non-secure world. > > > > > > > > > > Signed-off-by: Peng Fan > > > > > Cc: Shawn Guo > > > > > Cc: Sascha Hauer > > > > > Cc: Fabio Estevam > > > > > Cc: Russell King > > > > > Cc: Dong Aisheng > > > > > > > > Changed 'arm: ' prefix to 'ARM: ', and applied patch. > > > > > > I just tested it on 6sx-sdb, seems this patch breaks 6sx. Could you > > > first drop this patch? I'll send out v2 fix the 6sx issue soon. > > > > > > > Yes, i tested mx6ul/mx6sl ok but mx6sx sdb failed. > > Thanks for the test. > > > > > After a few debug, it seems you removed the l2c310_early_resume in > > v7_cpu_resume which is shared between lower power idle and suspend. > > > > Current only mx6sx/mx6ul supports low power idle in upstream, but mx6ul is > > A7 with internal L2, that's probably why only mx6sx showed the issue. > > > > I did the following quick try to restore L2 after exit lower power idle, but still > > can meet occasional crash during booting. > > > > diff --git a/arch/arm/mach-imx/cpuidle-imx6sx.c b/arch/arm/mach- > > imx/cpuidle-imx6sx.c > > index c5a5c3a..edce5bd 100644 > > --- a/arch/arm/mach-imx/cpuidle-imx6sx.c > > +++ b/arch/arm/mach-imx/cpuidle-imx6sx.c > > @@ -26,7 +26,7 @@ static int imx6sx_idle_finish(unsigned long val) > > * to adding conditional code for L2 cache type, > > * just call flush_cache_all() is fine. > > */ > > - flush_cache_all(); > > +// flush_cache_all(); > > I think flush_cache_all is still needed, to flush L1 data, right? > I thought it will be done in generic cpu_suspend. See: __cpu_suspend_save() So we still need it? Regards Dong Aisheng > > cpu_do_idle(); > > > > return 0; > > @@ -49,7 +49,9 @@ static int imx6sx_enter_wait(struct cpuidle_device *dev, > > cpu_pm_enter(); > > cpu_cluster_pm_enter(); > > > > + outer_disable(); > > cpu_suspend(0, imx6sx_idle_finish); > > + outer_resume(); > > Yes, this is in my V2 patch. > > > > > cpu_cluster_pm_exit(); > > cpu_pm_exit(); > > > > As this changed the order to L2 restore and cpu resume, so i'm not quite sure if > > lower power idle still requres L2 restore before CPU resume or something else > > we're missing. > > In low power idle, L2 may also lose power, so outer_disable/resume is needed, I think. > > Thanks, > Peng. > > > > > Regards > > Dong Aisheng > > > > > Thanks, > > > Peng. > > > > > > > > > > > Shawn