Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751215AbdL0FoC (ORCPT ); Wed, 27 Dec 2017 00:44:02 -0500 Received: from mail-by2nam03on0082.outbound.protection.outlook.com ([104.47.42.82]:48331 "EHLO NAM03-BY2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1750967AbdL0FoA (ORCPT ); Wed, 27 Dec 2017 00:44:00 -0500 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Thomas.Lendacky@amd.com; From: Tom Lendacky Subject: [PATCH] x86/cpu, x86/pti: Do not enable PTI on AMD processors To: x86@kernel.org Cc: Dave Hansen , linux-kernel@vger.kernel.org, Ingo Molnar , Andy Lutomirski , "H. Peter Anvin" , Thomas Gleixner , Borislav Petkov Date: Tue, 26 Dec 2017 23:43:54 -0600 Message-ID: <20171227054354.20369.94587.stgit@tlendack-t1.amdoffice.net> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: MWHPR12CA0039.namprd12.prod.outlook.com (10.172.49.25) To CY4PR12MB1142.namprd12.prod.outlook.com (10.168.163.150) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 97499746-2457-4ec5-996c-08d54cecd3f1 X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(4534020)(4602075)(4627115)(201703031133081)(201702281549075)(5600026)(4604075)(48565401081)(2017052603307)(7153060);SRVR:CY4PR12MB1142; X-Microsoft-Exchange-Diagnostics: 1;CY4PR12MB1142;3:AYJRFOOuP16HaVBEo3vVBqKI4/ITpROV2PruXUYY3yLZbp6x3C8QZqQscXLO4+jTRZIF/VLSS02mcDTPS88ZrbSlnYT2UHLNx5CyDk4rkJX9S6GTgKMcBQfQS1k1Pz+b10r0fKh6P1y+GINismsTg2VDQPOKYF3FX3RcvOoXuvkhohJSOk2zjwMCTyIH8hTdE0oGFg2dNz2iiME/7oMai5eIlMCozDjnAcV2Aah1aPncIlBTvpcngCAkUxKYTByY;25:q7mYvmsKJNxLW24Q1VcvG4qvub0ouUathnQaBdqVyy724EYDTg8nq0Vi4WAQjTUaRAPaD+eqelDbw5b4nmoanvYv5fNxDoWp5gCOGx0YgAMuefL0mmhwKWXu5zaHUzbax0O9NKxCxt760HlbLl0z6LZRik+M0JllABW3kM7zDsyG0bSCbCEaEzKxBJa+hkNyfCeeco9OzF/1IFuAm+mVP+7aSyz+4Ppo1qmQAzoJlLtQ/YTwoWcS5di7lln9oWYsx4x6hE+6l9y4rx+lKuKN2e4zzWYIqaxYpPjbZHFwgpvZpsimpKtSxwcS3imqZeFTHSUP5mzeYV4mQAxfK26MAQ==;31:az/rq3Mn8nY4yJlttq/ZyPhxn09m6TXUfr6wIMswrqhhl840YcFiJt+M2xi3fv/LUj8lkCBOut7hhDR3CxD1K2UZWnrwouOtAedK5SHAnLOG20t7nc3YP5DJ8kxdqjBtMmvHVe4z/JAzswb5RT/t269jIXuZdloZNBW3xq17FZ/2Eb/kSXSxeu3rV9ZZN5522jfqf9Rt9mD4oTODl+Q/EEG9Lwa44usScDJoKRDcRQ0= X-MS-TrafficTypeDiagnostic: CY4PR12MB1142: X-Microsoft-Exchange-Diagnostics: 1;CY4PR12MB1142;20:NHJqB4RLSe8azUyxLzha2/TGlDmxuo43rgkXpfXB/xIBFb0OyFOR0ajyBu/BSeksH6IZMHzBa7yPKNnAna4dmTb9juQ1w0pG5Q3MPOyWemra0EjuvPb+5eG9xz10vAcxYemFWmyFicT/GN6uMCMZ4ziNZhFWVurT/kTjPJiYCwZAvg6j47KkSgLxTbJnJfG7UJW1ZG2AFW6jYgF8Y/RMsF6jQK50CbYQrPoW5xkNwcbfsUrlXrNNm5MRDJGXOYJYv4znu08NDf9C+RQuDfKuTwnBD5favGkBuaQTnS5beqFj8GARHDfY0F/I/MyLsDTNFWnOi/kU1D7vjgM3Um5omQ/q7mQQPkG/z5voDV2voShA/wmSZ57AJlwxs1fdvUf4yt5LUYfJNs3E2FvrHwGj30FGGX2hSKRTi03sxFXb1c4bWN2jEMCfJ/RV+nQ4qDHyIb1w/2DYGYWg0M4BS8MA67HJfrryhcwWNt7Z8XZJDVV/DkrLyMssRojGWfpkpZZ6;4:OtgE/eWl7Tqr/bbwfBNRDjj+Z+VgujbRk0npdCxFaodzwE1GlRs0rZdy5rG1ztEhtZ30tJjofBDDUcl8Sah4YY+05mW0R0xWqeP1GDPFiRXL9rAL+KcykRfDuvKlfbdRAqV5RxR4PRCLtmLFLiFPV4roUHEOHaL8+XhLJeaNwvDeJOQ4eg+7wvHp4av01cONCjL6dUrAFyo1X7OyebE1DEz8qGZKBum2Ay9+h8kor0q/PAvQPHWW4bJJZt+8Bls4sTHbvufZ/ICxIlaHJGAJ5gT9ritlADoRY3+C9iJUuTMquoYw8N9TEJgYc7yOJLoG X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(767451399110); 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The AMD microarchitecture does not allow memory references, including speculative references, that access higher privileged data when running in a lesser privileged mode when that access would result in a page fault. Disable page table isolation by default on AMD processors by not setting the X86_BUG_CPU_INSECURE feature, which controls whether X86_FEATURE_PTI is set. Signed-off-by: Tom Lendacky --- arch/x86/kernel/cpu/common.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index c47de4e..7d9e3b0 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -923,8 +923,8 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c) setup_force_cpu_cap(X86_FEATURE_ALWAYS); - /* Assume for now that ALL x86 CPUs are insecure */ - setup_force_cpu_bug(X86_BUG_CPU_INSECURE); + if (c->x86_vendor != X86_VENDOR_AMD) + setup_force_cpu_bug(X86_BUG_CPU_INSECURE); fpu__init_system(c);