Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751979AbdL1Hqh (ORCPT ); Thu, 28 Dec 2017 02:46:37 -0500 Received: from vps0.lunn.ch ([185.16.172.187]:47933 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751043AbdL1Hqf (ORCPT ); Thu, 28 Dec 2017 02:46:35 -0500 Date: Thu, 28 Dec 2017 08:46:23 +0100 From: Andrew Lunn To: Russell King - ARM Linux Cc: Antoine Tenart , davem@davemloft.net, kishon@ti.com, jason@lakedaemon.net, sebastian.hesselbarth@gmail.com, gregory.clement@free-electrons.com, mw@semihalf.com, stefanc@marvell.com, ymarkman@marvell.com, thomas.petazzoni@free-electrons.com, miquel.raynal@free-electrons.com, nadavh@marvell.com, netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next 5/6] arm64: dts: marvell: mcbin: enable the fourth network interface Message-ID: <20171228074623.GA28444@lunn.ch> References: <20171227221446.18459-1-antoine.tenart@free-electrons.com> <20171227221446.18459-6-antoine.tenart@free-electrons.com> <20171227222401.GT10595@n2100.armlinux.org.uk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20171227222401.GT10595@n2100.armlinux.org.uk> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1550 Lines: 41 On Wed, Dec 27, 2017 at 10:24:01PM +0000, Russell King - ARM Linux wrote: > On Wed, Dec 27, 2017 at 11:14:45PM +0100, Antoine Tenart wrote: > > This patch enables the fourth network interface on the Marvell > > Macchiatobin. It is configured in the 2500Base-X PHY mode. > > > > Signed-off-by: Antoine Tenart > > --- > > arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts > > index b3350827ee55..c51efd511324 100644 > > --- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts > > +++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts > > @@ -279,6 +279,14 @@ > > phys = <&cps_comphy0 1>; > > }; > > > > +&cps_eth2 { > > + /* CPS Lane 5 */ > > + status = "okay"; > > + phy-mode = "2500base-x"; > > + /* Generic PHY, providing serdes lanes */ > > + phys = <&cps_comphy5 2>; > > +}; > > + > > This is wrong. This lane is connected to a SFP cage which can support > more than just 2500base-X. Tying it in this way to 2500base-X means > that this port does not support conenctions at 1000base-X, despite > that's one of the most popular and more standardised speeds. > Hi Antoine I agree with Russell here. SFP modules are hot pluggable, and support a range of interface modes. You need to query what the SFP module is in order to know how to configure the SERDES interface. The phylink infrastructure does that for you. Andrew