Subject: Re: [PATCH net-next 5/6] arm64: dts: marvell: mcbin: enable the
 fourth network interface
To: Antoine Tenart <antoine.tenart@free-electrons.com>,
        Andrew Lunn <andrew@lunn.ch>
Cc: thomas.petazzoni@free-electrons.com, ymarkman@marvell.com,
        jason@lakedaemon.net, netdev@vger.kernel.org,
        linux-kernel@vger.kernel.org,
        Russell King - ARM Linux <linux@armlinux.org.uk>, kishon@ti.com,
        nadavh@marvell.com, miquel.raynal@free-electrons.com,
        gregory.clement@free-electrons.com, stefanc@marvell.com,
        mw@semihalf.com, davem@davemloft.net,
        linux-arm-kernel@lists.infradead.org, sebastian.hesselbarth@gmail.com
References: <20171227221446.18459-1-antoine.tenart@free-electrons.com>
 <20171227221446.18459-6-antoine.tenart@free-electrons.com>
 <20171227222401.GT10595@n2100.armlinux.org.uk>
 <20171228074623.GA28444@lunn.ch> <20171228100519.GE2626@kwain>
From: Florian Fainelli <f.fainelli@gmail.com>
Message-ID: <462da70b-ba7d-6299-3e21-b619d3c4c7e6@gmail.com>
Date: Thu, 28 Dec 2017 07:02:09 -0800
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On 12/28/2017 02:05 AM, Antoine Tenart wrote:
> Hi Andrew,
> 
> On Thu, Dec 28, 2017 at 08:46:23AM +0100, Andrew Lunn wrote:
>> On Wed, Dec 27, 2017 at 10:24:01PM +0000, Russell King - ARM Linux wrote:
>>> On Wed, Dec 27, 2017 at 11:14:45PM +0100, Antoine Tenart wrote:
>>>>  
>>>> +&cps_eth2 {
>>>> +	/* CPS Lane 5 */
>>>> +	status = "okay";
>>>> +	phy-mode = "2500base-x";
>>>> +	/* Generic PHY, providing serdes lanes */
>>>> +	phys = <&cps_comphy5 2>;
>>>> +};
>>>> +
>>>
>>> This is wrong.  This lane is connected to a SFP cage which can support
>>> more than just 2500base-X.  Tying it in this way to 2500base-X means
>>> that this port does not support conenctions at 1000base-X, despite
>>> that's one of the most popular and more standardised speeds.
>>>
>>
>> I agree with Russell here. SFP modules are hot pluggable, and support
>> a range of interface modes. You need to query what the SFP module is
>> in order to know how to configure the SERDES interface. The phylink
>> infrastructure does that for you.
> 
> Sure, I understand. We'll be able to support such interfaces only when
> the phylink PPv2 support lands in.

Should we expect PHYLINK support to make it as the first patch in your
v2 of this patch series, or is someone else doing that?
-- 
Florian