Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755498AbdL2HyN (ORCPT ); Fri, 29 Dec 2017 02:54:13 -0500 Received: from mail-pg0-f65.google.com ([74.125.83.65]:33309 "EHLO mail-pg0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755480AbdL2HyJ (ORCPT ); Fri, 29 Dec 2017 02:54:09 -0500 X-Google-Smtp-Source: ACJfBosMzTpp83wwbn1YoOX+Ju9aT26JaXDdHRLquJV7bAMBXOtWlVUVU7WMaE+XBKtAyD1it6I2hg== From: Shunqian Zheng To: linux-rockchip@lists.infradead.org, linux-media@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, mchehab@kernel.org, sakari.ailus@linux.intel.com, hans.verkuil@cisco.com, tfiga@chromium.org, zhengsq@rock-chips.com, laurent.pinchart@ideasonboard.com, zyc@rock-chips.com, eddie.cai.linux@gmail.com, jeffy.chen@rock-chips.com, allon.huang@rock-chips.com, devicetree@vger.kernel.org, heiko@sntech.de, robh+dt@kernel.org, Joao.Pinto@synopsys.com, Luis.Oliveira@synopsys.com, Jose.Abreu@synopsys.com, jacob2.chen@rock-chips.com Subject: [PATCH v5 13/16] ARM: dts: rockchip: add rx0 mipi-phy for rk3288 Date: Fri, 29 Dec 2017 15:52:55 +0800 Message-Id: <1514533978-20408-14-git-send-email-zhengsq@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1514533978-20408-1-git-send-email-zhengsq@rock-chips.com> References: <1514533978-20408-1-git-send-email-zhengsq@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 794 Lines: 29 From: Jacob Chen It's a Designware MIPI D-PHY, used by ISP in rk3288. Signed-off-by: Jacob Chen --- arch/arm/boot/dts/rk3288.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 5dbfafb..a4c9a6e 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -864,6 +864,13 @@ status = "disabled"; }; + mipi_phy_rx0: mipi-phy-rx0 { + compatible = "rockchip,rk3288-mipi-dphy"; + clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_CSI>; + clock-names = "dphy-ref", "pclk"; + status = "disabled"; + }; + io_domains: io-domains { compatible = "rockchip,rk3288-io-voltage-domain"; status = "disabled"; -- 1.9.1