Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751339AbdL3BNs (ORCPT ); Fri, 29 Dec 2017 20:13:48 -0500 Received: from mail-wm0-f67.google.com ([74.125.82.67]:34540 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751273AbdL3BNn (ORCPT ); Fri, 29 Dec 2017 20:13:43 -0500 X-Google-Smtp-Source: ACJfBotEM4HqThRhFsmbTh8FZt8W+K/XCLOTix4OkskvSHo3Js6xOsZ3TEYiY2w0MSYwytTWNHM5uQ== From: "Bryan O'Donoghue" To: mturquette@baylibre.com, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: pure.logic@nexus-software.ie, Eugeniy Paltsev Subject: [PATCH 31/33] clk: ARC: change hsdk_pll_round_rate () return logic Date: Sat, 30 Dec 2017 01:13:10 +0000 Message-Id: <1514596392-22270-32-git-send-email-pure.logic@nexus-software.ie> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514596392-22270-1-git-send-email-pure.logic@nexus-software.ie> References: <1514596392-22270-1-git-send-email-pure.logic@nexus-software.ie> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1150 Lines: 33 This patch updates the round_rate() logic here to return zero instead of a negative number on error. In conjunction with higher-level changes associated with acting on the return value of clk_ops->round_rate() it is then possible to have clk_ops->round_rate() return values from 1 Hz to ULONG_MAX Hz instead of the current limitation of 1 Hz to LONG_MAX Hz. Signed-off-by: Bryan O'Donoghue Cc: Eugeniy Paltsev Cc: Michael Turquette Cc: Stephen Boyd Cc: linux-clk@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- drivers/clk/clk-hsdk-pll.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/clk-hsdk-pll.c b/drivers/clk/clk-hsdk-pll.c index 62c8e18..7bff5e3 100644 --- a/drivers/clk/clk-hsdk-pll.c +++ b/drivers/clk/clk-hsdk-pll.c @@ -201,7 +201,7 @@ static unsigned long hsdk_pll_round_rate(struct clk_hw *hw, unsigned long rate, const struct hsdk_pll_cfg *pll_cfg = clk->pll_devdata->pll_cfg; if (pll_cfg[0].rate == 0) - return -EINVAL; + return 0; best_rate = pll_cfg[0].rate; -- 2.7.4