Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751502AbdL3BTb (ORCPT ); Fri, 29 Dec 2017 20:19:31 -0500 Received: from mail-wm0-f66.google.com ([74.125.82.66]:44164 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750767AbdL3BNT (ORCPT ); Fri, 29 Dec 2017 20:13:19 -0500 X-Google-Smtp-Source: ACJfBov7TcQzE0vAWkMXl9G6iUHN0i3yo+Rx4Aj6VbgLfCGmRXLWBiYMf7RYMwufDqEpTFCA39FGXw== From: "Bryan O'Donoghue" To: mturquette@baylibre.com, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: pure.logic@nexus-software.ie, Boris Brezillon Subject: [PATCH 05/33] clk: at91: update clk_pll_get_best_div_mul to return unsigned long Date: Sat, 30 Dec 2017 01:12:44 +0000 Message-Id: <1514596392-22270-6-git-send-email-pure.logic@nexus-software.ie> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514596392-22270-1-git-send-email-pure.logic@nexus-software.ie> References: <1514596392-22270-1-git-send-email-pure.logic@nexus-software.ie> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1431 Lines: 37 clk_pll_get_best_div_mul() returns a value directly as the return value to round_rate(). clk_ops->round_rate() has been changed to an unsigned long so for the sake of completeness and neatness this patch updates the helper function to return the same data-type. Signed-off-by: Bryan O'Donoghue Cc: Boris Brezillon Cc: Michael Turquette Cc: Stephen Boyd Cc: linux-clk@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- drivers/clk/at91/clk-pll.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/clk/at91/clk-pll.c b/drivers/clk/at91/clk-pll.c index 4e7da3e..630203e 100644 --- a/drivers/clk/at91/clk-pll.c +++ b/drivers/clk/at91/clk-pll.c @@ -147,10 +147,11 @@ static unsigned long clk_pll_recalc_rate(struct clk_hw *hw, return (parent_rate / div) * (mul + 1); } -static long clk_pll_get_best_div_mul(struct clk_pll *pll, unsigned long rate, - unsigned long parent_rate, - u32 *div, u32 *mul, - u32 *index) { +static unsigned long clk_pll_get_best_div_mul(struct clk_pll *pll, + unsigned long rate, + unsigned long parent_rate, + u32 *div, u32 *mul, u32 *index) +{ const struct clk_pll_layout *layout = pll->layout; const struct clk_pll_characteristics *characteristics = pll->characteristics; -- 2.7.4